✓ CI.checkpatch: success for drm/i915/cx0: Set power state to ready only on owned PHY lanes (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/cx0: Set power state to ready only on owned PHY lanes (rev3)
URL   : https://patchwork.freedesktop.org/series/138990/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1a371f2bd58202bce862858e4a77533611a97bcc
Author: Vamsi Krishna Brahmajosyula <vamsikrishna.brahmajosyula at gmail.com>
Date:   Tue Sep 17 18:14:49 2024 +0530

    drm/i915/cx0: Set power state to ready only on owned PHY lanes
    
    In DP alt mode, when pin assignment is D, only one PHY lane is owned
    by the display. intel_cx0pll_enable currently performs a power state
    ready on both the lanes in all cases.
    
    Address the todo to perfom power state ready on owned lanes.
    
    Tested on Meteor Lake-P [Intel Arc Graphics] with DP alt mode.
    
    v2 -> v3:
    - Fix changelog per Jani Nikula's feedback
    v1 -> v2: Address Gustavo Sousa's feedback
    - Use owned lanes mask to set Phy power state to Ready, instead of
      maxpclk_lane with DP alt mode check.
    - Owned lanes are obtained from intel_cx0_get_owned_lane_mask().
    
    Signed-off-by: Vamsi Krishna Brahmajosyula <vamsikrishna.brahmajosyula at gmail.com>
+ /mt/dim checkpatch d5334f14ce6ca46c6537184c69e4e352ff6d7750 drm-intel
1a371f2bd582 drm/i915/cx0: Set power state to ready only on owned PHY lanes