[PATCH v4 0/9] AuxCCS handling and render compression modifiers

[Tvrtko Ursulin]

Hi Juha-Pekka,

On 02/04/2025 12:42, Juha-Pekka Heikkilä wrote:
> Hi Tvrtko,
> 
> I was going to run tests on your patches but there had just been
> changes onto emit_pipe_invalidate() exactly at place where you had
> added WA_14016712196 handling, so I didn't go figuring out what's the
> correct form. Can you do rebase and I'll see what I get with mtl.

I've rebased and split out the bad commit into many small ones so it is 
bisectable:

https://gitlab.freedesktop.org/tursulin/kernel/-/commits/adl-auxccs

I however thing the error of my ways was that I trusted MAX_JOB_SIZE_DW 
too much.

That is, when I added a new pipe control or two, I would bump it by 6 or 
12 respectively. What I did not account for that it may be wrong to 
start with. Because today I hand counted the worst case ring emission in 
__emit_job_gen12_render_compute and counted 57 dwords. While the define 
claims it is 48.

Hence I now have a first patch in the series which bumps it straight 
away to 58:

https://gitlab.freedesktop.org/tursulin/kernel/-/commit/8ce33fadee59dea5ba8272eeb0e2bf53d22fcb58

Then I bump it more as I am adding new commands.

Fingers crossed that was the bug and the only bug.

Thank you for testing!

Regards,

Tvrtko

> On Fri, Mar 28, 2025 at 6:35 PM Tvrtko Ursulin
> <tvrtko.ursulin at igalia.com> wrote:
>>
>> A series to fix and add xe support for AuxCSS framebuffers via DPT.
>>
>> Currently the auxiliary buffer data isn't mapped into the page tables at all so
>> cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
>> had to disable the support.
>>
>> On top of that there are missing flushes, invalidations and similar.
>>
>> Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
>>
>>    [PLANE:32:plane 1A]: type=PRI
>>            uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>>            hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>>
>> Display working fine - no artefacts, no DMAR/PIPE faults.
>>
>> v2:
>>   * More patches added to fix kms_flip_tiling.
>>
>> v3:
>>   * Rebased after some cleanup patches from v2 were merged.
>>   * Added people to Cc as suggested by Rodrigo.
>>   * Adjusted last patch title. (Rodrigo)
>>   * Apply GGTT flushing only to iomapped system memory buffers.
>>
>> v4:
>>   * Added patch for potentially misplaced Wa_14016712196.
>>   * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.
>>
>> Cc: José Roberto de Souza <jose.souza at intel.com>
>> Cc: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
>> Cc: Michael J. Ruhl <michael.j.ruhl at intel.com>
>> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
>>
>> Tvrtko Ursulin (9):
>>    drm/xe/xelpg: Move Wa_14016712196 to the invalidate path
>>    drm/xe: Add ring buffer handling for AuxCCS
>>    drm/xe: Use fb cached min alignment
>>    drm/xe: Reduce DPT table alignment as in i915
>>    drm/xe: Flush GGTT writes after populating DPT
>>    drm/xe: Handle DPT in system memory
>>    drm/xe: Force flush system memory AuxCCS framebuffers before scan out
>>    drm/xe/display: Add support for AuxCCS
>>    drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
>>
>>   .../drm/i915/display/skl_universal_plane.c    |   6 -
>>   drivers/gpu/drm/xe/display/xe_fb_pin.c        | 181 +++++++++++++----
>>   .../gpu/drm/xe/instructions/xe_gpu_commands.h |   2 +
>>   .../gpu/drm/xe/instructions/xe_mi_commands.h  |   6 +
>>   drivers/gpu/drm/xe/regs/xe_gt_regs.h          |   1 +
>>   drivers/gpu/drm/xe/xe_bo_types.h              |  14 +-
>>   drivers/gpu/drm/xe/xe_ring_ops.c              | 190 ++++++++++--------
>>   drivers/gpu/drm/xe/xe_ring_ops_types.h        |   2 +-
>>   8 files changed, 273 insertions(+), 129 deletions(-)
>>
>> --
>> 2.48.0
>>