✓ CI.checkpatch: success for drm/xe/display: Program double buffered LUT registers (rev7)

[Patchwork]

== Series Details ==

Series: drm/xe/display: Program double buffered LUT registers (rev7)
URL   : https://patchwork.freedesktop.org/series/142436/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
13a92ce9fd458ebd6064f23cec8c39c53d02ed26
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 94c3ad52c37ef4063964350f9ac49d130686a1d9
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah at intel.com>
Date:   Tue Apr 8 16:30:22 2025 +0530

    drm/i915: Disable updating of LUT values during vblank
    
    Do not schedule vblank worker for LUT update if the registers are
    double buffered
    
    v2: Do not schedule the worker at all (Ville)
    
    Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah at intel.com>
+ /mt/dim checkpatch a49a4787e6bc70296204f4a6e1b0fed3759938cd drm-intel
fecfebb630f8 drm/i915/dsb: Extract intel_dsb_ins_align()
6f325a1edbb6 drm/i915/dsb: Extract assert_dsb_tail_is_aligned()
bd7a783f1efa drm/i915/dsb: Extract intel_dsb_{head,tail}()
dda8ce702150 drm/i915/dsb: Implement intel_dsb_gosub()
b8ce77a83891 drm/i915/dsb: add intel_dsb_gosub_finish()
b1dd0657c0dc drm/i915/dsb: Add support for GOSUB interrupt
369bfd24f490 drm/i915: s/dsb_color_vblank/dsb_color
46e0451af3ad drm/i915: use GOSUB to program doubled buffered LUT registers
a9108e4d032e drm/i915: Program DB LUT registers before vblank
c212dfad6fc2 drm/i915/color: Do not pre-load LUTs with DB registers
94c3ad52c37e drm/i915: Disable updating of LUT values during vblank