[PATCH 5/8] drm/xe/guc: Bump the recommended GuC version to 70.44.1
Daniele Ceraolo Spurio
daniele.ceraolospurio at intel.com
Thu Apr 10 19:22:12 UTC 2025
On 4/8/2025 4:54 PM, John Harrison wrote:
> On 4/8/2025 3:15 PM, Daniele Ceraolo Spurio wrote:
>> On 4/3/2025 11:56 AM, John.C.Harrison at Intel.com wrote:
>>> From: John Harrison <John.C.Harrison at Intel.com>
>>>
>>> A new workaround requires a newer GuC version. So, recommend that
>>> users install it.
>>
>> The feature the WA is for is only officially supported for PTL+
>> though, so users aren't really impacted on anything else; I'm not
>> sure if we should recommend the update everywhere.
> It is unofficially supported on other platforms, though. And most of
> the platforms below are not officially supported by Xe at all, anyway.
> So 'official' support isn't exactly a deciding factor. There are also
> various other minor improvements since 70.29.2. So it was agreed that
> now was a good time to just do a blanket update.
Fair enough.
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Daniele
>
> John.
>
>>
>> Daniele
>>
>>>
>>> Signed-off-by: John Harrison <John.C.Harrison at Intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_uc_fw.c | 20 ++++++++++----------
>>> 1 file changed, 10 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c
>>> b/drivers/gpu/drm/xe/xe_uc_fw.c
>>> index 4a16d3c40ea9..2741849bbf4d 100644
>>> --- a/drivers/gpu/drm/xe/xe_uc_fw.c
>>> +++ b/drivers/gpu/drm/xe/xe_uc_fw.c
>>> @@ -114,16 +114,16 @@ struct fw_blobs_by_type {
>>> #define XE_GT_TYPE_ANY XE_GT_TYPE_UNINITIALIZED
>>> #define XE_GUC_FIRMWARE_DEFS(fw_def, mmp_ver,
>>> major_ver) \
>>> - fw_def(BATTLEMAGE, GT_TYPE_ANY, major_ver(xe, guc,
>>> bmg, 70, 29, 2)) \
>>> - fw_def(LUNARLAKE, GT_TYPE_ANY, major_ver(xe, guc,
>>> lnl, 70, 29, 2)) \
>>> - fw_def(METEORLAKE, GT_TYPE_ANY, major_ver(i915, guc,
>>> mtl, 70, 29, 2)) \
>>> - fw_def(DG2, GT_TYPE_ANY, major_ver(i915, guc,
>>> dg2, 70, 29, 2)) \
>>> - fw_def(DG1, GT_TYPE_ANY, major_ver(i915, guc,
>>> dg1, 70, 29, 2)) \
>>> - fw_def(ALDERLAKE_N, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 29, 2)) \
>>> - fw_def(ALDERLAKE_P, GT_TYPE_ANY, major_ver(i915, guc,
>>> adlp, 70, 29, 2)) \
>>> - fw_def(ALDERLAKE_S, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 29, 2)) \
>>> - fw_def(ROCKETLAKE, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 29, 2)) \
>>> - fw_def(TIGERLAKE, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 29, 2))
>>> + fw_def(BATTLEMAGE, GT_TYPE_ANY, major_ver(xe, guc,
>>> bmg, 70, 44, 1)) \
>>> + fw_def(LUNARLAKE, GT_TYPE_ANY, major_ver(xe, guc,
>>> lnl, 70, 44, 1)) \
>>> + fw_def(METEORLAKE, GT_TYPE_ANY, major_ver(i915, guc,
>>> mtl, 70, 44, 1)) \
>>> + fw_def(DG2, GT_TYPE_ANY, major_ver(i915, guc,
>>> dg2, 70, 44, 1)) \
>>> + fw_def(DG1, GT_TYPE_ANY, major_ver(i915, guc,
>>> dg1, 70, 44, 1)) \
>>> + fw_def(ALDERLAKE_N, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 44, 1)) \
>>> + fw_def(ALDERLAKE_P, GT_TYPE_ANY, major_ver(i915, guc,
>>> adlp, 70, 44, 1)) \
>>> + fw_def(ALDERLAKE_S, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 44, 1)) \
>>> + fw_def(ROCKETLAKE, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 44, 1)) \
>>> + fw_def(TIGERLAKE, GT_TYPE_ANY, major_ver(i915, guc,
>>> tgl, 70, 44, 1))
>>> #define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver) \
>>> fw_def(BATTLEMAGE, GT_TYPE_ANY, no_ver(xe, huc,
>>> bmg)) \
>>
>
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