✓ CI.checkpatch: success for series starting with [1/2] drm/i915/display: Add macro for checking 3 DSC engines

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/display: Add macro for checking 3 DSC engines
URL   : https://patchwork.freedesktop.org/series/147642/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
13a92ce9fd458ebd6064f23cec8c39c53d02ed26
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 7ccac502ba5340156d63d9e1f4c62f03a406a56b
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Mon Apr 14 08:12:56 2025 +0530

    drm/i915/dp: Check for HAS_DSC_3ENGINES while configuring DSC slices
    
    DSC 12 slices configuration is used for some specific cases with
    Ultrajoiner. This can be supported only when each of the 4 joined pipes
    have 3 DSC engines each.
    
    Add the missing check for 3 DSC engines support before using 3 DSC
    slices per pipe.
    
    Fixes: be7f5fcdf4a0 ("drm/i915/dp: Enable 3 DSC engines for 12 slices")
    Cc: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
    Cc: Suraj Kandpal <suraj.kandpal at intel.com>
    Cc: <stable at vger.kernel.org> # v6.14+
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch a2c9cfa67f8b676a78d18d572daebb04b38a8dc5 drm-intel
557f8ad33740 drm/i915/display: Add macro for checking 3 DSC engines
7ccac502ba53 drm/i915/dp: Check for HAS_DSC_3ENGINES while configuring DSC slices