✗ CI.checkpatch: warning for Fixes for steered register capture (rev2)

Patchwork patchwork at emeril.freedesktop.org
Thu Apr 17 21:38:54 UTC 2025


== Series Details ==

Series: Fixes for steered register capture (rev2)
URL   : https://patchwork.freedesktop.org/series/147940/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
13a92ce9fd458ebd6064f23cec8c39c53d02ed26
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f8d8cd9ee265b23d4f71eef89abb0094a109d9df
Author: John Harrison <John.C.Harrison at Intel.com>
Date:   Thu Apr 17 14:33:03 2025 -0700

    drm/xe/guc: Cache DSS info when creating capture register list
    
    Calculating the DSS id (index of a steered register) currently
    requires reading state from the hwconfig table and that currently
    requires dynamically allocating memory. The GuC based register capture
    (for dev core dumps) includes this index as part of the register name
    in the dump. However, it was calculating said index at the time of the
    dump for every dump. That is wasteful. It also breaks anyone trying to
    do the dump at a time when memory allocations are not allowed.
    
    So rather than calculating on every print, just calculate at start of
    day when creating the register list in the first place.
    
    Signed-off-by: John Harrison <John.C.Harrison at Intel.com>
+ /mt/dim checkpatch 5cd835ef6352a207fa4177184b397dfd82989e5d drm-intel
28bd661b73ef drm/xe/guc: Fix capture of steering registers
5b3362680563 drm/xe/guc: Use the steering flag when printing registers
f8d8cd9ee265 drm/xe/guc: Cache DSS info when creating capture register list
-:71: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#71: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:124:
+	{ INDIRECT_RING_STATE(0),	REG_32BIT,	0,	0,	0,	"INDIRECT_RING_STATE"}, \

-:81: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#81: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:134:
+	{ RING_EXECLIST_STATUS_HI(0),	REG_64BIT_HI_DW, 0,	0,	0,	"RING_EXECLIST_STATUS"}, \

-:83: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#83: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:136:
+	{ RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0,	0,	0,	"RING_EXECLIST_SQ_CONTENTS"}

-:94: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#94: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:143:
+	{ SC_INSTDONE_EXTRA,		REG_32BIT,	0,	0,	0,	"SC_INSTDONE_EXTRA"}, \

-:95: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#95: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:144:
+	{ SC_INSTDONE_EXTRA2,		REG_32BIT,	0,	0,	0,	"SC_INSTDONE_EXTRA2"}

total: 0 errors, 5 warnings, 0 checks, 155 lines checked




More information about the Intel-xe mailing list