[PATCH v4 5/5] drm/xe: Add atomic_svm_timeslice_ms debugfs entry

[Ghimiray, Himal Prasad]

On 22-04-2025 22:34, Matthew Brost wrote:
> Add some informal control for atomic SVM fault GPU timeslice to be able
> to play around with values and tweak performance.
> 
> v2:
>   - Reduce timeslice default value to 5ms
> 
> Signed-off-by: Matthew Brost <matthew.brost at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_debugfs.c      | 38 ++++++++++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_device.c       |  1 +
>   drivers/gpu/drm/xe/xe_device_types.h |  3 +++
>   drivers/gpu/drm/xe/xe_svm.c          |  3 ++-
>   4 files changed, 44 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
> index d0503959a8ed..d83cd6ed3fa8 100644
> --- a/drivers/gpu/drm/xe/xe_debugfs.c
> +++ b/drivers/gpu/drm/xe/xe_debugfs.c
> @@ -191,6 +191,41 @@ static const struct file_operations wedged_mode_fops = {
>   	.write = wedged_mode_set,
>   };
>   
> +static ssize_t atomic_svm_timeslice_ms_show(struct file *f, char __user *ubuf,
> +					    size_t size, loff_t *pos)
> +{
> +	struct xe_device *xe = file_inode(f)->i_private;
> +	char buf[32];
> +	int len = 0;
> +
> +	len = scnprintf(buf, sizeof(buf), "%d\n", xe->atomic_svm_timeslice_ms);
> +
> +	return simple_read_from_buffer(ubuf, size, pos, buf, len);
> +}
> +
> +static ssize_t atomic_svm_timeslice_ms_set(struct file *f,
> +					   const char __user *ubuf,
> +					   size_t size, loff_t *pos)
> +{
> +	struct xe_device *xe = file_inode(f)->i_private;
> +	u32 atomic_svm_timeslice_ms;
> +	ssize_t ret;
> +
> +	ret = kstrtouint_from_user(ubuf, size, 0, &atomic_svm_timeslice_ms);
> +	if (ret)
> +		return ret;
> +
> +	xe->atomic_svm_timeslice_ms = atomic_svm_timeslice_ms;
> +
> +	return size;
> +}
> +
> +static const struct file_operations atomic_svm_timeslice_ms_fops = {
> +	.owner = THIS_MODULE,
> +	.read = atomic_svm_timeslice_ms_show,
> +	.write = atomic_svm_timeslice_ms_set,
> +};
> +
>   void xe_debugfs_register(struct xe_device *xe)
>   {
>   	struct ttm_device *bdev = &xe->ttm;
> @@ -211,6 +246,9 @@ void xe_debugfs_register(struct xe_device *xe)
>   	debugfs_create_file("wedged_mode", 0600, root, xe,
>   			    &wedged_mode_fops);
>   
> +	debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
> +			    &atomic_svm_timeslice_ms_fops);
> +
>   	for (mem_type = XE_PL_VRAM0; mem_type <= XE_PL_VRAM1; ++mem_type) {
>   		man = ttm_manager_type(bdev, mem_type);
>   
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 75e753e0a682..abf3c72baaa6 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -444,6 +444,7 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
>   	xe->info.devid = pdev->device;
>   	xe->info.revid = pdev->revision;
>   	xe->info.force_execlist = xe_modparam.force_execlist;
> +	xe->atomic_svm_timeslice_ms = 5;
>   
>   	err = xe_irq_init(xe);
>   	if (err)
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index b9a892c44c67..6f5222f42410 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -567,6 +567,9 @@ struct xe_device {
>   	/** @pmu: performance monitoring unit */
>   	struct xe_pmu pmu;
>   
> +	/** @atomic_svm_timeslice_ms: Atomic SVM fault timeslice MS */
> +	u32 atomic_svm_timeslice_ms;
> +
>   #ifdef TEST_VM_OPS_ERROR
>   	/**
>   	 * @vm_inject_error_position: inject errors at different places in VM
> diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
> index d5376a76cdd1..de4eb04fc78e 100644
> --- a/drivers/gpu/drm/xe/xe_svm.c
> +++ b/drivers/gpu/drm/xe/xe_svm.c
> @@ -784,7 +784,8 @@ int xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
>   		.devmem_only = atomic && IS_DGFX(vm->xe) &&
>   			IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR),
>   		.timeslice_ms = atomic && IS_DGFX(vm->xe) &&
> -			IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) ? 5 : 0,
> +			IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) ?
> +			vm->xe->atomic_svm_timeslice_ms : 0,

LGTM
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>

>   	};
>   	struct xe_svm_range *range;
>   	struct drm_gpusvm_range *r;