[PATCH v2 03/13] drm/i915/display: Add source param for dc balance

[Nautiyal, Ankit K]

On 4/21/2025 9:18 PM, Mitul Golani wrote:
> Add source param for dc balance enablement further.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 87c666792c0d..653483fa99ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -144,6 +144,7 @@ struct intel_display_platforms {
>   #define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
>   #define HAS_ASYNC_FLIPS(__display)	(DISPLAY_VER(__display) >= 5)
>   #define HAS_AS_SDP(__display)		(DISPLAY_VER(__display) >= 13)
> +#define HAS_DC_BALANCE(__display)		(DISPLAY_VER(__display) >= 30)

Add in asciibetical order.

Also HAS VRR_DC_BALANCE or HAS_AS_DC_BALANCE would be better?


Regards,

Ankit

>   #define HAS_BIGJOINER(__display)	(DISPLAY_VER(__display) >= 11 && HAS_DSC(__display))
>   #define HAS_CDCLK_CRAWL(__display)	(DISPLAY_INFO(__display)->has_cdclk_crawl)
>   #define HAS_CDCLK_SQUASH(__display)	(DISPLAY_INFO(__display)->has_cdclk_squash)