[PATCH v3 2/3] drm/xe: Expose PCIe Gen4 downspeed attributes
Raag Jadav
raag.jadav at intel.com
Wed Apr 23 16:41:04 UTC 2025
On Wed, Apr 23, 2025 at 09:25:27PM +0530, Vivi, Rodrigo wrote:
> On Wed, 2025-04-23 at 18:01 +0300, Raag Jadav wrote:
...
> > And all of this will take place when the user is doing a "firmware
> > upgrade",
> > and this can potentially open the door for "link speed downgrade" to
> > be
> > confused with "firmware rollback (downgrade) done for the link
> > speed",
> > which is not the case.
>
> well, gen4 is not a firmware, but also
>
> is gen4_downspeed == gen3 ?!
I understand it as "downgrade to" than "downgrade from".
Would you prefer gen5_downgrade instead?
> yes, naming is hard and this is why we stick with the spec names
> without re-inventing it, which only increases the confusion.
>
> >
> > > > > > 2. This information is for the end user and has to be
> > > > > > translatable enough
> > > > > > regardless of what spec says about it and the distinction
> > > > > > reduces the
> > > > > > chances of misinterpretation.
> > >
> > > when you introduce a new term that is not known, I'd say the effect
> > > is
> > > pretty much the opposite and it can be even worse if a future pcie
> > > spec
> > > starts to use that term.
> >
> > Agree, unless we're expecting users to be informed about the spec to
> > be
> > able to flash their firmwares. But if you insist, sure will _upgrade_
> > the
> > document ;)
>
> I believe you meant 'update' the document! ;)
Well, I meant to use 'downgrade' but we'll be going up a revision,
so.. :D
Raag
More information about the Intel-xe
mailing list