✗ CI.checkpatch: warning for drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP

[Patchwork]

== Series Details ==

Series: drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP
URL   : https://patchwork.freedesktop.org/series/148422/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
202708c00696422fd217223bb679a353a5936e23
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 5eac4ff56517950a4c2e48c754ec817833dbb06b
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Tue Apr 29 20:00:55 2025 +0530

    drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP
    
    The register EMP_AS_SDP_TL (MTL) was introduced for configuring the
    double buffering point and transmission line for
    HDMI Video Timing Extended Metadata Packet (VTEMP) for VRR.
    This was also intended to be configured for DP to HDMI2.1 PCON to
    support VRR.
    
    From BMG and LNL+ onwards, this register was extended to Display Port
    Adaptive Sync SDP to have a common register to configure double
    buffering point and transmission line for both HDMI and DP VRR related
    packets.
    
    Currently, we do not support VRR for either native HDMI or via PCON.
    However we need to configure this for DP SDP case. As per the spec,
    program the register to set Vsync start as the double buffering point
    for DP AS SDP.
    
    Bspec:70984, 71197
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch 3f6ff17a8fd279cbaaee052bbf54458ea1ebfc8f drm-intel
5eac4ff56517 drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP
-:82: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#82: FILE: drivers/gpu/drm/i915/display/intel_vrr_regs.h:115:
+#define EMP_AS_SDP_DB_TL(db_transmit_line)	REG_FIELD_PREP(EMP_AS_SDP_DB_TL_MASK, (db_transmit_line))

total: 0 errors, 1 warnings, 0 checks, 50 lines checked