[PATCH 01/12] drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling
Golani, Mitulkumar Ajitkumar
mitulkumar.ajitkumar.golani at intel.com
Thu Aug 7 15:26:20 UTC 2025
> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal at intel.com>
> Sent: 07 August 2025 16:46
> To: intel-gfx at lists.freedesktop.org; intel-xe at lists.freedesktop.org
> Cc: ville.syrjala at linux.intel.com; jani.nikula at linux.intel.com; Golani,
> Mitulkumar Ajitkumar <mitulkumar.ajitkumar.golani at intel.com>; Nautiyal,
> Ankit K <ankit.k.nautiyal at intel.com>
> Subject: [PATCH 01/12] drm/i915/skl_watermark: Fix the scaling factor for
> chroma subsampling
>
> The Bspec:70151, mentions Chroma subsampling is a 2x downscale operation.
> This means that the downscale factor is 2 in each direction.
> So correct the downscaling factor to 4.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> ---
> drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index def5150231a4..df586509a742 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2185,7 +2185,7 @@ dsc_prefill_latency(const struct intel_crtc_state
> *crtc_state)
> crtc_state->hw.adjusted_mode.clock);
> int num_scaler_users = hweight32(scaler_state->scaler_users);
> int chroma_downscaling_factor =
> - crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
> + crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
> u32 dsc_prefill_latency = 0;
>
> if (!crtc_state->dsc.compression_enable || @@ -2228,7 +2228,7 @@
> scaler_prefill_latency(const struct intel_crtc_state *crtc_state)
> u64 hscale_k = max(1000, mul_u32_u32(scaler_state-
> >scalers[0].hscale, 1000) >> 16);
> u64 vscale_k = max(1000, mul_u32_u32(scaler_state-
> >scalers[0].vscale, 1000) >> 16);
> int chroma_downscaling_factor =
> - crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
> + crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
> int latency;
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
>
> latency = DIV_ROUND_UP_ULL((4 * linetime * hscale_k *
> vscale_k *
> --
> 2.45.2
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