[CI 0/5] drm/i915/tc: Fix enabled/disconnected DP-alt sink handling
Imre Deak
imre.deak at intel.com
Mon Aug 11 08:01:47 UTC 2025
This is the first part of [1], containing only the fixes required for
stable, resent separately as suggested by Luca.
Cc: Mika Kahola <mika.kahola at intel.com>
Cc: Luca Coelho <luciano.coelho at intel.com>
Cc: Jani Nikula <jani.nikula at intel.com>
[1] https://lore.kernel.org/all/20250805073700.642107-1-imre.deak@intel.com
Imre Deak (5):
drm/i915/lnl+/tc: Fix handling of an enabled/disconnected dp-alt sink
drm/i915/icl+/tc: Cache the max lane count value
drm/i915/lnl+/tc: Fix max lane count HW readout
drm/i915/lnl+/tc: Use the cached max lane count value
drm/i915/icl+/tc: Convert AUX powered WARN to a debug message
drivers/gpu/drm/i915/display/intel_tc.c | 92 ++++++++++++++++++++-----
1 file changed, 74 insertions(+), 18 deletions(-)
--
2.49.1
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