[PATCH 0/6] Account for DSC bubble overhead for horizontal slices
Ankit Nautiyal
ankit.k.nautiyal at intel.com
Tue Aug 12 04:14:21 UTC 2025
When DSC is enabled on a pipe, the pipe pixel rate input to cdclk frequency
and pipe joiner calculations needs to be adjusted to account for
compression overhead: specifically, the "bubbles" added at each horizontal
slice boundary. This overhead has always existed, even on earlier
platforms, but was not previously accounted for.
Currently, the number of joined pipes is computed much earlier than the
decision to use DSC—both during the mode_valid phase for each mode and in
the compute_config phase for a given mode. As a result, the DSC bubble
overhead cannot be considered when determining the number of pipes to join,
which may lead to incorrect configurations.
This series refactors the sequence of steps used to determine the number of
pipes to be joined and the DSC policy. The first few patches restructure
the mode_valid logic to make room for DSC bubble overhead accounting. The
final two patches introduce the actual overhead adjustment—one during cdclk
calculations and the other in the mode_valid step for DisplayPort.
#TODO: Account for the above overhead in DP compute_config phase.
As an alternative to this refactor, we could conservatively assume DSC will
always be used and apply the maximum possible slice count when computing
pipe joiner requirements. While this avoids structural changes, it may
overestimate the required overhead and force joiner usage in cases where it
was previously unnecessary. However, it would ensure that DSC bubble
overhead is always accounted for.
If the alternative approach works well across different platforms and
display modes, it could make the implementation easier and help avoid
changes in compute_config. But if it doesn't cover all cases reliably,
the refactoring in this series sets up a cleaner way to handle the
overhead properly, and we can extend it to compute_config.
Ankit Nautiyal (6):
drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid
drm/i915/dp: Extract code to get slice and bpp to a separate function
drm/i915/dp: Move num_joined_pipes and related checks together
drm/i915/dp: Rework pipe joiner logic in mode_valid
drm/i915/vdsc: Account for overhead bubbles in horizontal slices
drm/i915/dp: Account for dsc bubbles overhead in intel_dp_mode_valid()
drivers/gpu/drm/i915/display/intel_dp.c | 160 +++++++++++++++-------
drivers/gpu/drm/i915/display/intel_vdsc.c | 44 +++++-
drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +
3 files changed, 150 insertions(+), 56 deletions(-)
--
2.45.2
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