[PATCH 2/2] drm/xe/display: Make panic support work on vram.
Matthew Auld
matthew.auld at intel.com
Fri Aug 15 10:32:27 UTC 2025
On 31/07/2025 16:27, Maarten Lankhorst wrote:
> Add a special path for VRAM using xe_res iterators to ensure a panic
> screen is shown on VRAM as well.
>
> Signed-off-by: Maarten Lankhorst <dev at lankhorst.se>
> Acked-by: Jocelyn Falempe <jfalempe at redhat.com>
> ---
> drivers/gpu/drm/xe/display/intel_bo.c | 48 +++++++++++++++++++--------
> 1 file changed, 34 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c
> index 910632f57c3d6..f06bd8d98281a 100644
> --- a/drivers/gpu/drm/xe/display/intel_bo.c
> +++ b/drivers/gpu/drm/xe/display/intel_bo.c
> @@ -9,6 +9,7 @@
> #include "intel_display_types.h"
>
> #include "xe_bo.h"
> +#include "xe_res_cursor.h"
> #include "intel_bo.h"
>
> bool intel_bo_is_tiled(struct drm_gem_object *obj)
> @@ -66,9 +67,10 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
> }
>
> struct xe_panic_data {
> - struct page **pages;
> + struct xe_res_cursor res;
> + struct iosys_map vmap;
> +
> int page;
> - void *vaddr;
> };
>
> struct xe_framebuffer {
> @@ -83,11 +85,12 @@ static inline struct xe_panic_data *to_xe_panic_data(struct intel_framebuffer *f
>
> static void xe_panic_kunmap(struct xe_panic_data *panic)
> {
> - if (panic->vaddr) {
> - drm_clflush_virt_range(panic->vaddr, PAGE_SIZE);
> - kunmap_local(panic->vaddr);
> - panic->vaddr = NULL;
> + if (!panic->vmap.is_iomem && iosys_map_is_set(&panic->vmap)) {
> + drm_clflush_virt_range(panic->vmap.vaddr, PAGE_SIZE);
> + kunmap_local(panic->vmap.vaddr);
> }
> + iosys_map_clear(&panic->vmap);
> + panic->page = -1;
> }
>
> /*
> @@ -112,15 +115,29 @@ static void xe_panic_page_set_pixel(struct drm_scanout_buffer *sb, unsigned int
> new_page = offset >> PAGE_SHIFT;
> offset = offset % PAGE_SIZE;
> if (new_page != panic->page) {
> - xe_panic_kunmap(panic);
> + if (xe_bo_is_vram(bo)) {
> + /* Display is always mapped on root tile */
> + struct xe_vram_region *vram = xe_bo_device(bo)->mem.vram;
> +
> + if (panic->page < 0 || new_page < panic->page) {
> + xe_res_first(bo->ttm.resource, new_page * PAGE_SIZE,
> + bo->ttm.base.size - new_page * PAGE_SIZE, &panic->res);
> + } else {
> + xe_res_next(&panic->res, PAGE_SIZE * (new_page - panic->page));
> + }
> + iosys_map_set_vaddr_iomem(&panic->vmap,
> + vram->mapping + panic->res.start);
> + } else {
> + xe_panic_kunmap(panic);
> + iosys_map_set_vaddr(&panic->vmap,
> + ttm_bo_kmap_try_from_panic(&bo->ttm,
> + new_page));
> + }
> panic->page = new_page;
> - panic->vaddr = ttm_bo_kmap_try_from_panic(&bo->ttm,
> - panic->page);
> - }
> - if (panic->vaddr) {
> - u32 *pix = panic->vaddr + offset;
> - *pix = color;
> }
> +
> + if (iosys_map_is_set(&panic->vmap))
> + iosys_map_wr(&panic->vmap, offset, u32, color);
Just to double check. There is an l2 flush on BMG somewhere to ensure
display engine sees this write?
> }
>
> struct intel_framebuffer *intel_bo_alloc_framebuffer(void)
> @@ -137,6 +154,10 @@ int intel_bo_panic_setup(struct drm_scanout_buffer *sb)
> {
> struct intel_framebuffer *fb = (struct intel_framebuffer *)sb->private;
> struct xe_panic_data *panic = to_xe_panic_data(fb);
> + struct xe_bo *bo = gem_to_xe_bo(intel_fb_bo(&fb->base));
> +
> + if (xe_bo_is_vram(bo) && !xe_bo_is_visible_vram(bo))
> + return -ENODEV;
>
> panic->page = -1;
> sb->set_pixel = xe_panic_page_set_pixel;
> @@ -148,5 +169,4 @@ void intel_bo_panic_finish(struct intel_framebuffer *fb)
> struct xe_panic_data *panic = to_xe_panic_data(fb);
>
> xe_panic_kunmap(panic);
> - panic->page = -1;
> }
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