[PATCH v4 0/2] Tile and GT counting improvements

[Gustavo Sousa]

Quoting Gustavo Sousa (2025-08-18 15:15:45-03:00)
>This series improves the way we define values for tile_count and
>gt_count. In the first patch, we move the logic that probes for
>available tiles to a more appropriate location; in the second patch, we
>future-proof the way gt_count is calculated.
>
>Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>

Pushed to drm-xe-next. Thanks Jonathan and Rodrigo for the review!

--
Gustavo Sousa

>---
>Changes in v4:
>- Fix one issue found in CI (e.g. [1]), where we were trying to read
>  from the MTCFG in scenarios where mmio_multi_tile_setup() would not.
>  [1] https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152026v3/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
>- Link to v3: https://lore.kernel.org/r/20250818-gt_count-improvements-v3-0-32f6901e42e6@intel.com
>
>Changes in v3:
>- Rebased to get fresh CI results before applying.
>- Link to v2: https://lore.kernel.org/r/20250728-gt_count-improvements-v2-0-78841ce8a81c@intel.com
>
>Changes in v2:
>- Reworded last paragraph of commit message for the first patch.
>- Fixed KUnit failure.
>- Link to v1: https://lore.kernel.org/r/20250723-gt_count-improvements-v1-0-3016134db9ea@intel.com
>
>---
>Gustavo Sousa (2):
>      drm/xe: Probe for tile count during device info initialization
>      drm/xe: Use for_each_gt to define gt_count
>
> drivers/gpu/drm/xe/tests/xe_pci.c |  7 ++++++
> drivers/gpu/drm/xe/xe_mmio.c      | 33 --------------------------
> drivers/gpu/drm/xe/xe_pci.c       | 50 +++++++++++++++++++++++++++++++++++++--
> 3 files changed, 55 insertions(+), 35 deletions(-)
>---
>base-commit: edead24a80ae92312f75626eb92f2771ec5a7697
>change-id: 20250723-gt_count-improvements-d7be01330d73
>
>Best regards,
>-- 
>Gustavo Sousa <gustavo.sousa at intel.com>
>