[PATCH] drm/xe/nvm: Use root tile mmio

[Lucas De Marchi]

On Mon, Aug 25, 2025 at 04:05:37PM +0530, Riana Tauro wrote:
>To allow initialization of nvm during early probe for future usecases,
>use root tile instead of root gt to access mmios, as gt is not
>yet initialized at early probe.
>
>v2: fix commit message (Lucas)
>
>Signed-off-by: Riana Tauro <riana.tauro at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/xe/xe_nvm.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/drivers/gpu/drm/xe/xe_nvm.c
>index 61b0a1531a53..9ca4a5ae1693 100644
>--- a/drivers/gpu/drm/xe/xe_nvm.c
>+++ b/drivers/gpu/drm/xe/xe_nvm.c
>@@ -39,17 +39,17 @@ static void xe_nvm_release_dev(struct device *dev)
>
> static bool xe_nvm_non_posted_erase(struct xe_device *xe)
> {
>-	struct xe_gt *gt = xe_root_mmio_gt(xe);
>+	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
>
> 	if (xe->info.platform != XE_BATTLEMAGE)
> 		return false;
>-	return !(xe_mmio_read32(&gt->mmio, XE_REG(GEN12_CNTL_PROTECTED_NVM_REG)) &
>+	return !(xe_mmio_read32(mmio, XE_REG(GEN12_CNTL_PROTECTED_NVM_REG)) &
> 		 NVM_NON_POSTED_ERASE_CHICKEN_BIT);
> }
>
> static bool xe_nvm_writable_override(struct xe_device *xe)
> {
>-	struct xe_gt *gt = xe_root_mmio_gt(xe);
>+	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
> 	bool writable_override;
> 	resource_size_t base;
>
>@@ -72,7 +72,7 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
> 	}
>
> 	writable_override =
>-		!(xe_mmio_read32(&gt->mmio, HECI_FWSTS2(base)) &
>+		!(xe_mmio_read32(mmio, HECI_FWSTS2(base)) &
> 		  HECI_FW_STATUS_2_NVM_ACCESS_MODE);
> 	if (writable_override)
> 		drm_info(&xe->drm, "NVM access overridden by jumper\n");
>-- 
>2.47.1
>