✗ CI.checkpatch: warning for drm/i915/dp: Add support for DP UHBR SST DSC

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Add support for DP UHBR SST DSC
URL   : https://patchwork.freedesktop.org/series/144266/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 8575e2b3ab1ba59911a8b81cc8f322c0c47b59bf
Author: Jani Nikula <jani.nikula at intel.com>
Date:   Mon Feb 3 18:08:34 2025 +0200

    drm/i915/dp: Add support for DP UHBR SST DSC
    
    Drop the UHBR limitation from DP SST DSC, and handle SST DSC bandwidth
    computation for UHBR using intel_dp_mtp_tu_compute_config().
    
    Cc: Imre Deak <imre.deak at intel.com>
    Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+ /mt/dim checkpatch 907133c4b6b53621c4e90697c1cc85ccef3f5711 drm-intel
8575e2b3ab1b drm/i915/dp: Add support for DP UHBR SST DSC
-:50: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#50: FILE: drivers/gpu/drm/i915/display/intel_dp.c:1986:
+								     lane_count, adjusted_mode->clock,

total: 0 errors, 1 warnings, 0 checks, 51 lines checked