[PATCH] drm/xe/xe3: Extend wa_15015404425 for xe3

Lucas De Marchi lucas.demarchi at intel.com
Thu Feb 6 23:33:18 UTC 2025


On Thu, Feb 06, 2025 at 09:12:49AM -0800, Matt Atwood wrote:
>On Thu, Jan 30, 2025 at 09:30:30AM -0800, Matt Roper wrote:
>> On Tue, Jan 28, 2025 at 04:55:51PM -0800, Matt Atwood wrote:
>> > From: Tejas Upadhyay <tejas.upadhyay at intel.com>
>> >
>> > wa_15015404425 applies to xe3 A0 step as well.
>>
>> We really need a better commit message explaining how this workaround is
>> different from our usual ones and why it needs to be handled in a
>> special way that's different from all of our other workarounds,
>> especially since someone who just quickly skims the workaround database
>> without digging into the details is going to incorrectly think this just
>> applies to Xe2 media and isn't relevant to PTL.
>Ack.
>>
>> I was kind of hoping we'd add a more well-defined infrastructure for
>> handling device / SoC workarounds.  Adding quick hacks like this is
>> going to get out of hand quickly if more of these start showing up.
>Any particular ideas here?

at the very least, use XE_WA(). You may need to extend the matches it
knows about to implement what you need here.

Lucas De Marchi

>+Lucas
>>
>>
>> Matt
>>
>> >
>> > v2: query based off SOC stepping
>> >
>> > Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
>> > Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
>> > ---
>> >  drivers/gpu/drm/xe/xe_mmio.c | 13 +++++++------
>> >  drivers/gpu/drm/xe/xe_step.h |  2 ++
>> >  2 files changed, 9 insertions(+), 6 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
>> > index d321a21aacf0..98d068ad33bb 100644
>> > --- a/drivers/gpu/drm/xe/xe_mmio.c
>> > +++ b/drivers/gpu/drm/xe/xe_mmio.c
>> > @@ -150,14 +150,15 @@ int xe_mmio_init(struct xe_device *xe)
>> >  static void mmio_flush_pending_writes(struct xe_mmio *mmio)
>> >  {
>> >  #define DUMMY_REG_OFFSET	0x130030
>> > +	struct xe_device *xe = tile_to_xe(mmio->tile);
>> >  	int i;
>> >
>> > -	if (mmio->tile->xe->info.platform != XE_LUNARLAKE)
>> > -		return;
>> > -
>> > -	/* 4 dummy writes */
>> > -	for (i = 0; i < 4; i++)
>> > -		writel(0, mmio->regs + DUMMY_REG_OFFSET);
>> > +	if (xe->info.platform == XE_LUNARLAKE ||
>> > +	    (xe->info.platform == XE_PANTHERLAKE &&
>> > +	     xe->info.revid == PTL_SOC_STEP_A0))
>> > +		/* 4 dummy writes */
>> > +		for (i = 0; i < 4; i++)
>> > +			writel(0, mmio->regs + DUMMY_REG_OFFSET);
>> >  }
>> >
>> >  u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)
>> > diff --git a/drivers/gpu/drm/xe/xe_step.h b/drivers/gpu/drm/xe/xe_step.h
>> > index 686cb59200c2..879486a818e9 100644
>> > --- a/drivers/gpu/drm/xe/xe_step.h
>> > +++ b/drivers/gpu/drm/xe/xe_step.h
>> > @@ -20,4 +20,6 @@ static inline u32 xe_step_to_gmdid(enum xe_step step) { return step - STEP_A0; }
>> >
>> >  const char *xe_step_name(enum xe_step step);
>> >
>> > +#define PTL_SOC_STEP_A0  0x0
>> > +
>> >  #endif
>> > --
>> > 2.45.0
>> >
>>
>> --
>> Matt Roper
>> Graphics Software Engineer
>> Linux GPU Platform Enablement
>> Intel Corporation


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