✗ CI.checkpatch: warning for drm/xe/uapi: Use hint for guc to set GT frequency (rev6)
Patchwork
patchwork at emeril.freedesktop.org
Wed Feb 12 12:02:02 UTC 2025
== Series Details ==
Series: drm/xe/uapi: Use hint for guc to set GT frequency (rev6)
URL : https://patchwork.freedesktop.org/series/143793/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
22f9cda3436b4fe965b5c5f31d2f2c1bcb483189
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0b1c4a51cf049994fdbbe40ffd30cbbaf7e1abd7
Author: Tejas Upadhyay <tejas.upadhyay at intel.com>
Date: Wed Feb 12 17:08:30 2025 +0530
drm/xe/uapi: Use hint for guc to set GT frequency
Allow user to provide a low latency hint. When set, KMD sends a hint
to GuC which results in special handling for that process. SLPC will
ramp the GT frequency aggressively every time it switches to this
process.
We need to enable the use of SLPC Compute strategy during init, but
it will apply only to processes that set this bit during process
creation.
Improvement with this approach as below:
Before,
:~$ NEOReadDebugKeys=1 EnableDirectSubmission=0 clpeak --kernel-latency
Platform: Intel(R) OpenCL Graphics
Device: Intel(R) Graphics [0xe20b]
Driver version : 24.52.0 (Linux x64)
Compute units : 160
Clock frequency : 2850 MHz
Kernel launch latency : 283.16 us
After,
:~$ NEOReadDebugKeys=1 EnableDirectSubmission=0 clpeak --kernel-latency
Platform: Intel(R) OpenCL Graphics
Device: Intel(R) Graphics [0xe20b]
Driver version : 24.52.0 (Linux x64)
Compute units : 160
Clock frequency : 2850 MHz
Kernel launch latency : 63.38 us
UMD Compute PR : https://github.com/intel/compute-runtime/pull/794
UMD Mesa PR : https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33214
v9(Vinay):
- remove extra line, align commit message
v8(Vinay):
- Add separate example for using low latency hint
v7(Jose):
- Update UMD PR
- applicable to all gpus
V6:
- init flags, remove redundant flags check (MAuld)
V5:
- Move uapi doc to documentation and GuC ABI specific change (Rodrigo)
- Modify logic to restrict exec queue flags (MAuld)
V4:
- To make it clear, dont use exec queue word (Vinay)
- Correct typo in description of flag (Jose/Vinay)
- rename set_strategy api and replace ctx with exec queue(Vinay)
- Start with 0th bit to indentify user flags (Jose)
V3:
- Conver user flag to kernel internal flag and use (Oak)
- Support query config for use to check kernel support (Jose)
- Dont need to take runtime pm (Vinay)
V2:
- DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT 1 is already planned for other hint(Szymon)
- Add motivation to description (Lucas)
Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
+ /mt/dim checkpatch a05c910166dda7fc8b510e5c9771c3bed3fbb906 drm-intel
0b1c4a51cf04 drm/xe/uapi: Use hint for guc to set GT frequency
-:39: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#39:
UMD Mesa PR : https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33214
total: 0 errors, 1 warnings, 0 checks, 191 lines checked
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