✗ CI.checkpatch: warning for drm/i915/fbc: FBC Dirty rect feature support

[Patchwork]

== Series Details ==

Series: drm/i915/fbc: FBC Dirty rect feature support
URL   : https://patchwork.freedesktop.org/series/144723/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
22f9cda3436b4fe965b5c5f31d2f2c1bcb483189
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit cb6e9d7e3c01bede0df5b17ff1933ccbb8c2c1b4
Author: Vinod Govindapillai <vinod.govindapillai at intel.com>
Date:   Wed Feb 12 15:14:20 2025 +0200

    drm/i915/xe3: disable FBC if PSR2 selective fetch is enabled
    
    It is not recommended to have both FBC dirty rect and PSR2
    selective fetch be enabled at the same time. If PSR2 selective
    fetch or panel replay is on, mark FBC as not possible.
    
    v2: fix the condition to disable FBC if PSR2 enabled (Jani)
    
    v3: use HAS_FBC_DIRTY_RECT()
    
    Bspec: 68881
    Signed-off-by: Vinod Govindapillai <vinod.govindapillai at intel.com>
+ /mt/dim checkpatch 5bf5e8eecd1eaeb1f5c0c36b5047d6884b5b8668 drm-intel
24f7851ebe54 drm/damage-helper: add const qualifier in drm_atomic_helper_damage_merged()
e2b932baf08a drm/i915/xe3: update and store the plane damage clips
82680b90568b drm/i915/xe3: add register definitions for fbc dirty rect support
-:24: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#24: FILE: drivers/gpu/drm/i915/display/intel_fbc_regs.h:107:
+#define   FBC_DIRTY_RECT_START_LINE(val)	REG_FIELD_PREP(FBC_DIRTY_RECT_START_LINE_MASK, (val))

total: 0 errors, 1 warnings, 0 checks, 15 lines checked
7f51c8cba193 drm/i915/xe3: introduce HAS_FBC_DIRTY_RECT() for FBC dirty rect support
19bc7265d74c drm/i915/xe3: avoid calling fbc activate if fbc is active
738bbacc3cd5 drm/i915/xe3: dirty rect support for FBC
cb6e9d7e3c01 drm/i915/xe3: disable FBC if PSR2 selective fetch is enabled