✗ CI.checkpatch: warning for drm/i915/ddi: Fix/simplify port enabling/disabling (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/ddi: Fix/simplify port enabling/disabling (rev2)
URL   : https://patchwork.freedesktop.org/series/144121/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
22f9cda3436b4fe965b5c5f31d2f2c1bcb483189
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 2247bc9e0dcdc66fd475f330ddbf6eeac4b5d1ab
Author: Imre Deak <imre.deak at intel.com>
Date:   Fri Feb 14 16:20:01 2025 +0200

    drm/i915/ddi: Sanitize DDI_BUF_CTL register definitions
    
    Align the DDI_BUF_CTL register flag definitions with how this is done
    elsewhere.
    
    v2: Robustify macro calls with parens. (Jani)
    
    Reviewed-by: Jani Nikula <jani.nikula at intel.com>
    Signed-off-by: Imre Deak <imre.deak at intel.com>
+ /mt/dim checkpatch 57457d93f156d8b4bdff8d138127d81b8f97d8c9 drm-intel
a67e151699be drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro
1d4ecf87a2ef drm/i915/ddi: Fix HDMI port width programming in DDI_BUF_CTL
-:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'width' - possible side-effects?
#36: FILE: drivers/gpu/drm/i915/i915_reg.h:3642:
+#define  DDI_PORT_WIDTH(width)			(((width) == 3 ? 4 : ((width) - 1)) << 1)

total: 0 errors, 0 warnings, 1 checks, 16 lines checked
5c8f7a83aa1e drm/i915/ddi: Make all the PORT_WIDTH macros work the same way
-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'width' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h:113:
+#define   XELPDP_PORT_WIDTH(width)			REG_FIELD_PREP(XELPDP_PORT_WIDTH_MASK, \
+								       ((width) == 3 ? 4 : (width) - 1))

-:27: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#27: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h:114:
+								       ((width) == 3 ? 4 : (width) - 1))

total: 0 errors, 1 warnings, 1 checks, 51 lines checked
0f1f5eaacf6f drm/i915/ddi: Set missing TC DP PHY lane stagger delay in DDI_BUF_CTL
9093c1871e3a drm/i915/ddi: Simplify the port enabling via DDI_BUF_CTL
111a355ce423 drm/i915/ddi: Simplify the port disabling via DDI_BUF_CTL
8b7cf01f0c3e drm/i915/ddi: Simplify waiting for a port to get active/idle via DDI_BUF_CTL
c9bd26f1c1ac drm/i915/ddi: Move platform checks within mtl_ddi_enable/disable_d2d_link()
f96ad11fea30 drm/i915/ddi: Unify the platform specific functions disabling a port
a21e3e02a443 drm/i915/ddi: Add a helper to enable a port
2247bc9e0dcd drm/i915/ddi: Sanitize DDI_BUF_CTL register definitions
-:50: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'width' - possible side-effects?
#50: FILE: drivers/gpu/drm/i915/i915_reg.h:3647:
+#define  DDI_PORT_WIDTH(width)			REG_FIELD_PREP(DDI_PORT_WIDTH_MASK, \
+							       ((width) == 3 ? 4 : (width) - 1))

total: 0 errors, 0 warnings, 1 checks, 39 lines checked