✓ CI.checkpatch: success for drm/i915/display: Allow display PHYs to reset power state (rev5)

Patchwork patchwork at emeril.freedesktop.org
Tue Feb 18 12:19:28 UTC 2025


== Series Details ==

Series: drm/i915/display: Allow display PHYs to reset power state (rev5)
URL   : https://patchwork.freedesktop.org/series/144103/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
22f9cda3436b4fe965b5c5f31d2f2c1bcb483189
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ccc29d03a0ee7f948cf36b8a4a6e718269195a09
Author: Mika Kahola <mika.kahola at intel.com>
Date:   Tue Feb 18 12:00:19 2025 +0200

    drm/i915/display: Allow display PHYs to reset power state
    
    The dedicated display PHYs reset to a power state that blocks S0ix,
    increasing idle system power. After a system reset (cold boot,
    S3/4/5, warm reset) if a dedicated PHY is not being brought up
    shortly, use these steps to move the PHY to the lowest power state
    to save power.
    
    1. Follow the PLL Enable Sequence, using any valid frequency such
       as DP 1.62 GHz. This brings lanes out of reset and enables the
       PLL to allow powerdown to be moved to the Disable state.
    2. Follow PLL Disable Sequence. This moves powerdown to the Disable
       state and disables the PLL.
    
    v2: Rename WA function to more descriptive (Jani)
        For PTL, only port A needs this wa
        Add helpers to check presence of C10 phy and pll enabling (Imre)
    v3: Rename wa function (Imre)
        Check return value of C10 pll tables readout (Imre)
        Use PLL request to check pll enabling (Imre)
    v4: Move intel_cx0_pll_is_enabled() right after
        intel_cx0_pll_disable() (Imre)
        Add drm_WARN_ON() if C10 state cannot be calculated from
        the tables (Imre)
    v5: Add debug message on PLL enabling (Imre)
        Add check for intel_encoder_is_dig_port() (Imre)
    
    Signed-off-by: Mika Kahola <mika.kahola at intel.com>
+ /mt/dim checkpatch 4587c05996666a92af63f86ba410bae1dc940794 drm-intel
fdeb2e0822b4 drm/i915/display: Drop crtc_state from C10/C20 pll programming
ccc29d03a0ee drm/i915/display: Allow display PHYs to reset power state




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