[PATCH v10 0/8] Add support for EU stall sampling

[Dixit, Ashutosh]

On Tue, 18 Feb 2025 11:53:50 -0800, Harish Chegondi wrote:
>
> The following patch series add support for EU stall sampling,
> a new hardware feature first added in PVC and is being supported
> in XE2 and later architecture GPUs. This feature would enable
> capturing of EU stall data which include the IP address of the
> instruction stalled and various stall reason counts.
>
> Support for this feature is being added into Mesa:
> https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30142
>
> New IGT tests for EU stall sampling are being added:
> https://patchwork.freedesktop.org/series/143030/
>
> This patch series has undergone basic testing with the new IGT tests.
>
> Issues that need investigation:
> 1. Blocked reads with small user buffers may be blocked even with EU
> stall data in the kernel buffer as a previous read has set pollin to
> false even when kernel buffer has data that could be read but the user
> buffer is too small to read all the data.

Related to the above would potentially be better locking for stream->pollin.

> v2: Rename xe perf layer as xe observation layer (Ashutosh)

>
> Test-with: cover.1739901972.git.harish.chegondi at intel.com

Not sure why we don't see the EU stall IGT's running in Xe.CI.Full.