[PATCH v3 0/4] Workaround fixes, improvements, additions

Tvrtko Ursulin tvrtko.ursulin at igalia.com
Wed Feb 26 11:21:02 UTC 2025


A few things here.

0001:
I think per engine GT workarounds are broken. None apply since engines are not
set up yet.

0002-003:
I did a small audit of i915 vs xe workarounds and tunings with focus on ADL-P
and found some deltas. But without access to the internal database and even
up to date PRMs it is required if someone double checks the two.

Motivation being that there is some interest to make xe work on ADL-P as good as
possible.

0004:
With the split between workarounds and tunings it feels useful to expose the
list of latter in debugfs too.

v2:
 * Attempt to fix first patch.
 * L3 hashing patch tidy.

v3:
 * New approach for "drm/xe: Fix GT "for each engine" workarounds".
 * Review comments for "drm/xe/gen12: L3 recommended hashing mask".

Tvrtko Ursulin (4):
  drm/xe: Fix GT "for each engine" workarounds
  drm/xe/gen12: Add Wa_1604555607
  drm/xe/gen12: L3 recommended hashing mask
  drm/xe: Add performance tunings to debugfs

 drivers/gpu/drm/xe/regs/xe_gt_regs.h |  5 +-
 drivers/gpu/drm/xe/xe_gt.c           |  8 ++-
 drivers/gpu/drm/xe/xe_gt_debugfs.c   | 11 +++++
 drivers/gpu/drm/xe/xe_gt_types.h     | 10 ++++
 drivers/gpu/drm/xe/xe_tuning.c       | 73 ++++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_tuning.h       |  3 ++
 6 files changed, 104 insertions(+), 6 deletions(-)

-- 
2.48.0



More information about the Intel-xe mailing list