✓ CI.checkpatch: success for drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency

[Patchwork]

== Series Details ==

Series: drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency
URL   : https://patchwork.freedesktop.org/series/145541/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
22f9cda3436b4fe965b5c5f31d2f2c1bcb483189
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit cb4786d12d322a18d0ff65879b3a628481689884
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Thu Feb 27 09:11:06 2025 +0530

    drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency
    
    Currently, during the computation of global watermarks, the latency for
    each scaler user is calculated to compute the DSC prefill latency.
    At this point, the number of scaler users can exceed the number of
    supported scalers, which is checked later in intel_atomic_setup_scalers().
    
    This can cause issues when the number of scaler users exceeds the number
    of supported scalers.
    
    While checking for DSC prefill, ensure that the number of scaler users does
    not exceed the number of supported scalers.
    
    Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4341
    Fixes: a9b14af999b0 ("drm/i915/dsc: Check if vblank is sufficient for dsc prefill")
    Cc: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
    Cc: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
    Cc: Jani Nikula <jani.nikula at linux.intel.com>
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch 8541a64154cd8b9c07977dedc1d22883f43279a0 drm-intel
cb4786d12d32 drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency