✓ CI.checkpatch: success for drm/i915/dmc_wl: Track pipe interrupt registers

[Patchwork]

== Series Details ==

Series: drm/i915/dmc_wl: Track pipe interrupt registers
URL   : https://patchwork.freedesktop.org/series/143103/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit cf35d2eb3f0c79350c7fc3445df952eb76f8bc16
Author: Gustavo Sousa <gustavo.sousa at intel.com>
Date:   Fri Jan 3 14:41:37 2025 -0300

    drm/i915/dmc_wl: Track pipe interrupt registers
    
    Pipe interrupt registers live in their respective pipes' power wells,
    which are below PG0. That means that they must also be tracked as
    registers that are powered-off during dynamic DC states.
    
    There are probably more ranges that we need to track down and add to the
    powered_off_ranges. However, let's make this change only about pipe
    interrupt registers to fix some vblank timeouts observed due to the DMC
    wakelock not being taken for those registers.
    
    In the future, we might want to replace powered_off_ranges with a new
    table to represent registers in PG0, which should be probably easier to
    maintain. Any register not belonging to that table should be considered
    powered off during dynamic DC states and, as such, requiring the DMC
    wakelock for access.
    
    Bspec: 72519, 71583
    Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
+ /mt/dim checkpatch a13d9317e32763f1942b5a5347f475309b0a029e drm-intel
175df446dd78 drm/i915/display: Use display MMIO functions in intel_display_irq.c
d86e38b73981 drm/i915/display: Wrap IRQ-specific uncore functions
cf35d2eb3f0c drm/i915/dmc_wl: Track pipe interrupt registers