[PATCH v2] drm/xe/ptl: Apply Wa_14023061436
Matt Roper
matthew.d.roper at intel.com
Wed Jan 8 20:11:11 UTC 2025
On Wed, Jan 08, 2025 at 03:13:23PM +0100, Nirmoy Das wrote:
> Enable WMTP for the BTD kernel to address Wa14023061436 by setting the
> proper TDL Chicken Bit.
>
> v2: Apply it on engine_was[] as this register is not part of LRC(Matt)
> Apply it for first_render_or_compute in case this gets extended to
> compute only platforms(Matt).
>
> Cc: Gustavo Sousa <gustavo.sousa at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 +++
> drivers/gpu/drm/xe/xe_wa.c | 5 +++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 162f18e975da..b4283ac030f4 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -500,6 +500,9 @@
> #define LSC_L1_FLUSH_CTL_3D_DATAPORT_FLUSH_EVENTS_MASK REG_GENMASK(13, 11)
> #define DIS_ATOMIC_CHAINING_TYPED_WRITES REG_BIT(3)
>
> +#define TDL_CHICKEN XE_REG_MCR(0xe5f4, XE_REG_OPTION_MASKED)
> +#define QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE REG_BIT(12)
> +
> #define LSC_CHICKEN_BIT_0 XE_REG_MCR(0xe7c8)
> #define DISABLE_D8_D16_COASLESCE REG_BIT(30)
> #define WR_REQ_CHAINING_DIS REG_BIT(26)
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 570fe0376402..744dba4fdb58 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -613,6 +613,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> XE_RTP_ACTIONS(FIELD_SET(SAMPLER_MODE, SMP_WAIT_FETCH_MERGING_COUNTER,
> SMP_FORCE_128B_OVERFETCH))
> },
> + { XE_RTP_NAME("14023061436"),
> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
> + FUNC(xe_rtp_match_first_render_or_compute)),
> + XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))
> + },
>
> {}
> };
> --
> 2.46.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
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