✓ CI.checkpatch: success for drm/i915/dmc_wl: Track pipe interrupt registers (rev2)
Patchwork
patchwork at emeril.freedesktop.org
Mon Jan 13 21:27:28 UTC 2025
== Series Details ==
Series: drm/i915/dmc_wl: Track pipe interrupt registers (rev2)
URL : https://patchwork.freedesktop.org/series/143103/
State : success
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 925178566ee7d6d26138b59b041256fec1666271
Author: Gustavo Sousa <gustavo.sousa at intel.com>
Date: Mon Jan 13 17:38:58 2025 -0300
drm/i915/dmc_wl: Track pipe interrupt registers
Pipe interrupt registers live in their respective pipes' power wells,
which are below PG0. That means that they must also be tracked as
registers that are powered-off during dynamic DC states.
There are probably more ranges that we need to track down and add to the
powered_off_ranges. However, let's make this change only about pipe
interrupt registers to fix some vblank timeouts observed due to the DMC
wakelock not being taken for those registers.
In the future, we might want to replace powered_off_ranges with a new
table to represent registers in PG0, which should be probably easier to
maintain. Any register not belonging to that table should be considered
powered off during dynamic DC states and, as such, requiring the DMC
wakelock for access.
Bspec: 72519, 71583
Reviewed-by: Jouni Högander <jouni.hogander at intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
+ /mt/dim checkpatch 20058aae3e619821197cd32b736893f1d7917ba3 drm-intel
e35f918a4385 drm/i915/display: Use display MMIO functions in intel_display_irq.c
d2a9f6e25991 drm/i915/display: Wrap IRQ-specific uncore functions
925178566ee7 drm/i915/dmc_wl: Track pipe interrupt registers
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