✗ CI.checkpatch: warning for drm/i915/xe3: FBC Dirty rect feature support (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/xe3: FBC Dirty rect feature support (rev3)
URL   : https://patchwork.freedesktop.org/series/141526/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f529db75f8dcdb34d771f787a8dad940880a977e
Author: Vinod Govindapillai <vinod.govindapillai at intel.com>
Date:   Tue Jan 14 14:07:19 2025 +0200

    drm/i915/xe3: disable FBC if PSR2 selective fetch is enabled
    
    It is not recommended to have both FBC and PSR2 selective fetch
    be enabled at the same time in a plane. If PSR2 selective fetch
    or panel replay is on, mark FBC as not possible in that plane.
    
    v2: fix the condition to disable FBC if PSR2 enabled (Jani)
    
    Bspec: 68881
    Signed-off-by: Vinod Govindapillai <vinod.govindapillai at intel.com>
+ /mt/dim checkpatch 3deaca65541212fd09c8832090815813e6128caa drm-intel
844de26722b6 drm/i915/display: avoid calling fbc activate if fbc is active
d4bd8313a35f drm/i915/xe: add register definitions for fbc dirty rect support
-:24: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#24: FILE: drivers/gpu/drm/i915/display/intel_fbc_regs.h:107:
+#define   FBC_DIRTY_RECT_START_LINE(val)	REG_FIELD_PREP(FBC_DIRTY_RECT_START_LINE_MASK, (val))

total: 0 errors, 1 warnings, 0 checks, 15 lines checked
39099485ea83 drm/i915/xe3: add dirty rect support for FBC
-:129: CHECK:LINE_SPACING: Please don't use multiple blank lines
#129: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:1254:
+
+

total: 0 errors, 0 warnings, 1 checks, 176 lines checked
f529db75f8dc drm/i915/xe3: disable FBC if PSR2 selective fetch is enabled