[PATCH] drm/xe/xe_lpg: Port 2 WAs from i915 to Xe
Aradhya Bhatia
aradhya.bhatia at intel.com
Wed Jan 15 08:00:48 UTC 2025
Port Wa_16021333562 and Wa_14016712196 for Xe_LPG_MD (G:12.70), and
Xe_LPG_LG (G:12.71) MeteorLake (MTL) platforms, from drm/i915 to drm/xe.
Also fix the lineage number of Wa_18013179988 for the MTL platform.
Signed-off-by: Aradhya Bhatia <aradhya.bhatia at intel.com>
---
drivers/gpu/drm/xe/xe_gt_mcr.c | 3 +++
drivers/gpu/drm/xe/xe_guc_ads.c | 5 +++++
drivers/gpu/drm/xe/xe_oa.c | 3 +--
drivers/gpu/drm/xe/xe_ring_ops.c | 3 +++
drivers/gpu/drm/xe/xe_wa_oob.rules | 2 ++
5 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index a1676b787fdc..0471baff635d 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -5,6 +5,8 @@
#include "xe_gt_mcr.h"
+#include <generated/xe_wa_oob.h>
+
#include "regs/xe_gt_regs.h"
#include "xe_assert.h"
#include "xe_gt.h"
@@ -14,6 +16,7 @@
#include "xe_guc_hwconfig.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
+#include "xe_wa.h"
/**
* DOC: GT Multicast/Replicated (MCR) Register Support
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index fab259adc380..8ef044ddd682 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -376,6 +376,11 @@ static void guc_waklv_init(struct xe_guc_ads *ads)
GUC_WORKAROUND_KLV_ID_BACK_TO_BACK_RCS_ENGINE_RESET,
&offset, &remain);
+ if (XE_WA(gt, 16021333562))
+ guc_waklv_enable_simple(ads,
+ GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED,
+ &offset, &remain);
+
size = guc_ads_waklv_size(ads) - remain;
if (!size)
return;
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index eeb96b5f49e2..90d62e621d3e 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -1854,9 +1854,8 @@ u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
u32 reg, shift;
/*
- * Wa_18013179988:dg2
+ * Wa_18013179988:dg2/mtl
* Wa_14015568240:pvc
- * Wa_14015846243:mtl
*/
switch (gt_to_xe(gt)->info.platform) {
case XE_DG2:
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 9f327f27c072..22c226c30df9 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -192,6 +192,9 @@ static int emit_render_cache_flush(struct xe_sched_job *job, u32 *dw, int i)
else if (job->q->class == XE_ENGINE_CLASS_COMPUTE)
flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
+ if (XE_WA(gt, 14016712196))
+ i = emit_pipe_control(dw, i, 0, PIPE_CONTROL_DEPTH_CACHE_FLUSH, 0, 0);
+
return emit_pipe_control(dw, i, PIPE_CONTROL0_HDC_PIPELINE_FLUSH, flags, 0, 0);
}
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 40438c3d9b72..4872c5d21610 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -42,3 +42,5 @@
no_media_l3 MEDIA_VERSION(3000)
14022866841 GRAPHICS_VERSION(3000), GRAPHICS_STEP(A0, B0)
MEDIA_VERSION(3000), MEDIA_STEP(A0, B0)
+16021333562 GRAPHICS_VERSION_RANGE(1270, 1271)
+14016712196 GRAPHICS_VERSION_RANGE(1270, 1271)
base-commit: 3318ef9888d5b4f5c5a9473180fd0b16e9ef266d
--
2.34.1
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