[PATCH] drm/i915/dp: Correct max compressed bpp bounds by using link bpp

[Rodrigo Vivi]

On Thu, Jan 16, 2025 at 06:24:36PM +0200, Jani Nikula wrote:
> On Thu, 16 Jan 2025, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> > On Thu, Jan 16, 2025 at 03:24:16PM +0530, Ankit Nautiyal wrote:
> >> While setting the bounds for compressed bpp we ensure that the
> >> compressed bpp is less than the pipe bpp.
> >> 
> >> This gives an issue with 420 output format where effective link bpp is
> >> half that of the pipe bpp. Therefore instead of pipe bpp use link bpp to
> >> set the bounds for the compressed bpp.
> >> 
> >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++--
> >
> > patches to i915, even when they target only platforms supported by
> > xe should also be sent to intel-gfx mainlinlist...
> 
> Agreed... but this one was? :)

doh! my bad... I'm sorry...

my lei scripts goof-up + I probably need new glasses...

> 
> BR,
> Jani.
> 
> >
> >>  1 file changed, 8 insertions(+), 2 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> index 1ad25c37f3c2..47fcfbcb893b 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> @@ -2068,9 +2068,12 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp,
> >>  			    int timeslots)
> >>  {
> >>  	int i, ret;
> >> +	int link_bpp;
> >> +
> >> +	link_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp);
> >>  
> >>  	/* Compressed BPP should be less than the Input DSC bpp */
> >> -	dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1);
> >> +	dsc_max_bpp = min(dsc_max_bpp, link_bpp - 1);
> >>  
> >>  	for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp); i++) {
> >>  		if (valid_dsc_bpp[i] < dsc_min_bpp)
> >> @@ -2113,6 +2116,7 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
> >>  	u8 bppx16_incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd);
> >>  	u16 compressed_bppx16;
> >>  	u8 bppx16_step;
> >> +	int link_bpp;
> >>  	int ret;
> >>  
> >>  	if (DISPLAY_VER(display) < 14 || bppx16_incr <= 1)
> >> @@ -2120,8 +2124,10 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
> >>  	else
> >>  		bppx16_step = 16 / bppx16_incr;
> >>  
> >> +	link_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp);
> >> +
> >>  	/* Compressed BPP should be less than the Input DSC bpp */
> >> -	dsc_max_bpp = min(dsc_max_bpp << 4, (pipe_bpp << 4) - bppx16_step);
> >> +	dsc_max_bpp = min(dsc_max_bpp << 4, (link_bpp << 4) - bppx16_step);
> >>  	dsc_min_bpp = dsc_min_bpp << 4;
> >>  
> >>  	for (compressed_bppx16 = dsc_max_bpp;
> >> -- 
> >> 2.45.2
> >> 
> 
> -- 
> Jani Nikula, Intel