[PATCH v2 1/2] drm/xe/xe: Add Wa_16021333562 and Wa_14016712196

[Matt Roper]

On Thu, Jan 16, 2025 at 08:45:26AM -0600, Lucas De Marchi wrote:
> On Thu, Jan 16, 2025 at 02:40:03PM +0530, Aradhya Bhatia wrote:
> > Wa_16021333562 and Wa_14016712196 are permanent workarounds that apply
> > to multiple platforms. Wa_16021333562 applies to platforms ranging from
> > TGL (12.00) to Xe_LPM (13.00), while Wa_14016712196 from DG2 (12.55) to
> > Xe_LPG (12.74).
> > 
> > Signed-off-by: Aradhya Bhatia <aradhya.bhatia at intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_guc_ads.c    | 5 +++++
> > drivers/gpu/drm/xe/xe_ring_ops.c   | 3 +++
> > drivers/gpu/drm/xe/xe_wa_oob.rules | 2 ++
> > 3 files changed, 10 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> > index fab259adc380..8ef044ddd682 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> > @@ -376,6 +376,11 @@ static void guc_waklv_init(struct xe_guc_ads *ads)
> > 					GUC_WORKAROUND_KLV_ID_BACK_TO_BACK_RCS_ENGINE_RESET,
> > 					&offset, &remain);
> > 
> > +	if (XE_WA(gt, 16021333562))
> > +		guc_waklv_enable_simple(ads,
> > +					GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED,
> > +					&offset, &remain);
> > +
> > 	size = guc_ads_waklv_size(ads) - remain;
> > 	if (!size)
> > 		return;
> > diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> > index 9f327f27c072..22c226c30df9 100644
> > --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> > +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> > @@ -192,6 +192,9 @@ static int emit_render_cache_flush(struct xe_sched_job *job, u32 *dw, int i)
> > 	else if (job->q->class == XE_ENGINE_CLASS_COMPUTE)
> > 		flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
> > 
> > +	if (XE_WA(gt, 14016712196))
> > +		i = emit_pipe_control(dw, i, 0, PIPE_CONTROL_DEPTH_CACHE_FLUSH, 0, 0);
> > +
> > 	return emit_pipe_control(dw, i, PIPE_CONTROL0_HDC_PIPELINE_FLUSH, flags, 0, 0);
> > }
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > index 40438c3d9b72..536b91cc4d3f 100644
> > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > @@ -42,3 +42,5 @@
> > no_media_l3	MEDIA_VERSION(3000)
> > 14022866841	GRAPHICS_VERSION(3000), GRAPHICS_STEP(A0, B0)
> > 		MEDIA_VERSION(3000), MEDIA_STEP(A0, B0)
> > +16021333562	GRAPHICS_VERSION_RANGE(1200, 1300)
> 
> this doesn't match the wa db. I think it should be:
> 
> 16021333562	GRAPHICS_VERSION_RANGE(1200, 1274)
> 		MEDIA_VERSION(1300)
> 
> ... so it doesn´t mach more than it should for the graphics gt and less
> than it should for media gt.
> 
> Matt Roper, any idea why in i915 it's matching less than it should? Is
> it because prior to DG2, the platforms were not officially using GuC?
> There we have:
> 
> 	/* Wa_16021333562 */
> 	if ((GUC_FIRMWARE_VER(guc) >= MAKE_GUC_VER(70, 21, 1)) &&
> 	    (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) ||
> 	     IS_MEDIA_GT_IP_RANGE(gt, IP_VER(13, 0), IP_VER(13, 0)) ||
> 	     IS_DG2(gt->i915)))
> 		guc_waklv_enable_simple(guc, &offset, &remain,
> 					GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED);
> 
> or because GuC implements GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED
> only for newer platforms... ?
> 
> Also, why are we not using this graphics range?
> 
> 	IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 55), IP_VER(12, 74))
> 
> From the WA db, 12.60 (aka PVC) is also affected.

I think this is one of the ones that the hardware team added platforms
to one by one and when the code for MTL + DG2 was written the
workaround's status wasn't finalized for PVC (or other platforms) yet.
E.g., checking the internal database, it looks like they finalized the
status of this one on PVC on Sept 20th, whereas the i915 patch was
written four months earlier in May.


Matt

> 
> Lucas De Marchi
> 
> > +14016712196	GRAPHICS_VERSION_RANGE(1255, 1274)
> > -- 
> > 2.34.1
> > 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation