✓ CI.checkpatch: success for Check Scaler and DSC Prefill Latency Against Vblank (rev5)

[Patchwork]

== Series Details ==

Series: Check Scaler and DSC Prefill Latency Against Vblank (rev5)
URL   : https://patchwork.freedesktop.org/series/143159/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 7e6839887c21b4c7f1ccef7d87c5c1e75fbcf891
Author: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
Date:   Fri Jan 17 13:14:21 2025 +0530

    drm/i915/dsc: Check if vblank is sufficient for dsc prefill
    
    High refresh rate panels which may have small line times
    and vblank sizes, Check if vblank size is sufficient for
    dsc prefill latency.
    
    --v2:
    - Consider chroma downscaling factor in latency calculation. [Ankit]
    - Replace with appropriate function name.
    
    --v3:
    - Remove FIXME tag.[Ankit]
    - Replace Ycbcr444 to Ycbcr420.[Anit]
    - Correct precision. [Ankit]
    - Use some local valiables like linetime_factor and latency to
    adjust precision.
    - Declare latency to 0 initially to avoid returning any garbage values.
    - Account for second scaler downscaling factor as well. [Ankit]
    
    --v4:
    - Improvise hscale and vscale calculation. [Ankit]
    - Use appropriate name for number of scaler users. [Ankit]
    - Update commit message and rebase.
    - Add linetime and cdclk prefill adjustment calculation. [Ankit]
    
    --v5:
    - Update bspec link in trailer. [Ankit]
    - Correct hscale, vscale datatype. [Ankit]
    - Use intel_crtc_compute_min_cdclk. [Ankit]
    
    --v6:
    - Use cdclk_state->logical.cdclk instead of
    intel_crtc_compute_min_cdclk. [Ankit]
    
    Bspec: 70151
    Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
+ /mt/dim checkpatch a15d2a84505eed8dbb58911147e44752734f3a88 drm-intel
7dfc54eb5df3 drm/i915/scaler: Add and compute scaling factors
a3832421ed18 drm/i915/scaler: Use crtc_state to setup plane or pipe scaler
aff6a253ef8a drm/i915/scaler: Refactor max_scale computation
e77a859101ca drm/i915/scaler: Compute scaling factors for pipe scaler
ba48569ea783 drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420
2a87836bb10a drm/i915/scaler: Check if vblank is sufficient for scaler
7e6839887c21 drm/i915/dsc: Check if vblank is sufficient for dsc prefill