[PATCH] drm/xe/uapi: Fix documentation indentation

[Upadhyay, Tejas]

> -----Original Message-----
> From: Vivi, Rodrigo <rodrigo.vivi at intel.com>
> Sent: Saturday, January 18, 2025 1:08 AM
> To: intel-xe at lists.freedesktop.org
> Cc: Vivi, Rodrigo <rodrigo.vivi at intel.com>; Stephen Rothwell
> <sfr at canb.auug.org.au>; Upadhyay, Tejas <tejas.upadhyay at intel.com>
> Subject: [PATCH] drm/xe/uapi: Fix documentation indentation
> 
> Fix these issues:
> 
> Documentation/gpu/driver-uapi:29: include/uapi/drm/xe_drm.h:817:
> WARNING:
> +Bullet list ends without a blank line; unexpected unindent.
> Documentation/gpu/driver-uapi:29: include/uapi/drm/xe_drm.h:835:
> WARNING:
> +Definition list ends without a blank line; unexpected unindent.

Unfortunately none of these showed up in checkpatch or with strict option as well. Nevertheless 
Change Looks fine to me,

Reviewed-by: Tejas Upadhyay <tejas.upadhyay at intel.com>

Tejas
> 
> Fixes: 75d37750a753 ("drm/xe/mmap: Add mmap support for PCI memory
> barrier")
> Reported-by: Stephen Rothwell <sfr at canb.auug.org.au>
> Closes: https://lore.kernel.org/intel-
> xe/20250117164023.3fdc00b9 at canb.auug.org.au/
> Cc: Tejas Upadhyay <tejas.upadhyay at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  include/uapi/drm/xe_drm.h | 36 ++++++++++++++++++------------------
>  1 file changed, 18 insertions(+), 18 deletions(-)
> 
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h index
> cac607a30f6d..e2160330ad01 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -814,29 +814,29 @@ struct drm_xe_gem_create {
>   *
>   * The @flags can be:
>   *  - %DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER - For user to query
> special offset
> - *  for use in mmap ioctl. Writing to the returned mmap address will generate
> a
> - *  PCI memory barrier with low overhead (avoiding IOCTL call as well as
> writing
> - *  to VRAM which would also add overhead), acting like an MI_MEM_FENCE
> - *  instruction.
> + *    for use in mmap ioctl. Writing to the returned mmap address will
> generate a
> + *    PCI memory barrier with low overhead (avoiding IOCTL call as well as
> writing
> + *    to VRAM which would also add overhead), acting like an
> MI_MEM_FENCE
> + *    instruction.
>   *
> - *  Note: The mmap size can be at most 4K, due to HW limitations. As a result
> - *  this interface is only supported on CPU architectures that support 4K page
> - *  size. The mmap_offset ioctl will detect this and gracefully return an
> - *  error, where userspace is expected to have a different fallback method for
> - *  triggering a barrier.
> + * Note: The mmap size can be at most 4K, due to HW limitations. As a
> + result
> + * this interface is only supported on CPU architectures that support
> + 4K page
> + * size. The mmap_offset ioctl will detect this and gracefully return
> + an
> + * error, where userspace is expected to have a different fallback
> + method for
> + * triggering a barrier.
>   *
> - *  Roughly the usage would be as follows:
> + * Roughly the usage would be as follows:
>   *
> - *  .. code-block:: C
> + * .. code-block:: C
>   *
> - *  struct drm_xe_gem_mmap_offset mmo = {
> - *	.handle = 0, // must be set to 0
> - *	.flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
> - *  };
> + *     struct drm_xe_gem_mmap_offset mmo = {
> + *         .handle = 0, // must be set to 0
> + *         .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
> + *     };
>   *
> - *  err = ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo);
> - *  map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
> - *  map[i] = 0xdeadbeaf; // issue barrier
> + *     err = ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo);
> + *     map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
> + *     map[i] = 0xdeadbeaf; // issue barrier
>   */
>  struct drm_xe_gem_mmap_offset {
>  	/** @extensions: Pointer to the first extension struct, if any */
> --
> 2.48.1