✗ CI.checkpatch: warning for drm/i915/dp: Guarantee a minimum HBlank time (rev9)
Patchwork
patchwork at emeril.freedesktop.org
Wed Jan 22 09:10:13 UTC 2025
== Series Details ==
Series: drm/i915/dp: Guarantee a minimum HBlank time (rev9)
URL : https://patchwork.freedesktop.org/series/139268/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b4173172308e6902c962fcb4d74ba9bf25d11d69
Author: Arun R Murthy <arun.r.murthy at intel.com>
Date: Wed Jan 22 11:25:42 2025 +0530
drm/i915/dp: Guarantee a minimum HBlank time
Mandate a minimum Hblank symbol cycle count between BlankingStart and
BlankingEnd in 8b/10b MST and 128b/132b mode.
v2: Affine calculation/updation of min HBlank to dp_mst (Jani)
v3: moved min_hblank from struct intel_dp to intel_crtc_state (Jani)
v4: use max/min functions, change intel_xx *intel_xx to intel_xx *xx
(Jani)
Limit hblank to 511 and accommodate BS/BE in calculated value
(Srikanth)
v5: Some spelling corrections (Suraj)
v6: Removed DP2.1 in comment as this is applicable for both DP2.1 and
DP1.4 (Suraj)
v7: crtc_state holds the logical values and the register value
computation is moved to mst_enable() (Jani)
v8: Limit max hblank to 0x10, disable min_hblank on mst_disable (Jani)
Bspec: 74379
Signed-off-by: Arun R Murthy <arun.r.murthy at intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal at intel.com>
+ /mt/dim checkpatch 71b6a6ef0f37fe2d812dc2bd6d4b0d2d52096d07 drm-intel
b4173172308e drm/i915/dp: Guarantee a minimum HBlank time
-:159: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#159: FILE: drivers/gpu/drm/i915/i915_reg.h:3202:
+#define DP_MIN_HBLANK_CTL(trans) _MMIO_TRANS(trans, _DP_MIN_HBLANK_CTL_A, _DP_MIN_HBLANK_CTL_B)
total: 0 errors, 1 warnings, 0 checks, 113 lines checked
More information about the Intel-xe
mailing list