✗ CI.checkpatch: warning for Add HDMI PLL Algorithm for SNPS/C10PHY (rev6)

[Patchwork]

== Series Details ==

Series: Add HDMI PLL Algorithm for SNPS/C10PHY (rev6)
URL   : https://patchwork.freedesktop.org/series/135396/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0874e855a4dccb9833372ed94c7ce60b1d835ed1
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Mon Jan 20 09:51:21 2025 +0530

    drm/i915/cx0_phy: Use HDMI PLL algorithm for C10 PHY
    
    Try HDMI PLL alogorithm for C10 PHY, if there are no pre-computed tables.
    Also get rid of the helpers to get rate for HDMI for C10/20 PHY, as we no
    longer depend only on pre-computed tables.
    
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
    Reviewed-by: Suraj Kandpal <suraj.kandpal at intel.com>
+ /mt/dim checkpatch 6834acba715b85cbecfeb660b9695806e98c9a0a drm-intel
27fbd46cd2fa drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
-:48: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 317 lines checked
ca78f5616d22 drm/i915/snps_phy: Use HDMI PLL algorithm for DG2
66a3b15838c1 drm/i915/cx0_phy_regs: Add C10 registers bits
8f93e4ac1461 drm/i915/intel_snps_hdmi_pll: Compute C10 HDMI PLLs with algorithm
0874e855a4dc drm/i915/cx0_phy: Use HDMI PLL algorithm for C10 PHY