[PATCH v5 3/3] drm/xe: Initialize mei-gsc and vsec in survivability mode
Riana Tauro
riana.tauro at intel.com
Mon Jan 27 08:07:16 UTC 2025
Initialize mei-gsc in survivability mode and disable HECI
interrupts. Also initialize vsec in survivability mode
Signed-off-by: Riana Tauro <riana.tauro at intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Reviewed-by: Alexander Usyskin <alexander.usyskin at intel.com>
---
drivers/gpu/drm/xe/xe_heci_gsc.c | 3 ++-
drivers/gpu/drm/xe/xe_survivability_mode.c | 7 +++++++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_heci_gsc.c b/drivers/gpu/drm/xe/xe_heci_gsc.c
index d765bfd3636b..06dc78d3a812 100644
--- a/drivers/gpu/drm/xe/xe_heci_gsc.c
+++ b/drivers/gpu/drm/xe/xe_heci_gsc.c
@@ -12,6 +12,7 @@
#include "xe_drv.h"
#include "xe_heci_gsc.h"
#include "xe_platform_types.h"
+#include "xe_survivability_mode.h"
#define GSC_BAR_LENGTH 0x00000FFC
@@ -200,7 +201,7 @@ void xe_heci_gsc_init(struct xe_device *xe)
return;
}
- if (!def->use_polling) {
+ if (!def->use_polling && !xe_survivability_mode_enabled(xe)) {
ret = heci_gsc_irq_setup(xe);
if (ret)
goto fail;
diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index 633f5effa349..c619560af74f 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -12,8 +12,10 @@
#include "xe_device.h"
#include "xe_gt.h"
+#include "xe_heci_gsc.h"
#include "xe_mmio.h"
#include "xe_pcode_api.h"
+#include "xe_vsec.h"
#define MAX_SCRATCH_MMIO 8
@@ -142,6 +144,10 @@ static void enable_survivability_mode(struct pci_dev *pdev)
dev_warn(dev, "Failed to create survivability sysfs files\n");
return;
}
+
+ xe_heci_gsc_init(xe);
+
+ xe_vsec_init(xe);
}
/**
@@ -194,6 +200,7 @@ void xe_survivability_mode_remove(struct xe_device *xe)
struct device *dev = &pdev->dev;
sysfs_remove_file(&dev->kobj, &dev_attr_survivability_mode.attr);
+ xe_heci_gsc_fini(xe);
kfree(survivability->info);
pci_set_drvdata(pdev, NULL);
}
--
2.47.1
More information about the Intel-xe
mailing list