[PATCH] drm/xe/xe3: Extend wa_15015404425 for xe3

[Matt Atwood]

From: Tejas Upadhyay <tejas.upadhyay at intel.com>

wa_15015404425 applies to xe3 A0 step as well.

v2: query based off SOC stepping

Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
---
 drivers/gpu/drm/xe/xe_mmio.c | 13 +++++++------
 drivers/gpu/drm/xe/xe_step.h |  2 ++
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index d321a21aacf0..98d068ad33bb 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -150,14 +150,15 @@ int xe_mmio_init(struct xe_device *xe)
 static void mmio_flush_pending_writes(struct xe_mmio *mmio)
 {
 #define DUMMY_REG_OFFSET	0x130030
+	struct xe_device *xe = tile_to_xe(mmio->tile);
 	int i;
 
-	if (mmio->tile->xe->info.platform != XE_LUNARLAKE)
-		return;
-
-	/* 4 dummy writes */
-	for (i = 0; i < 4; i++)
-		writel(0, mmio->regs + DUMMY_REG_OFFSET);
+	if (xe->info.platform == XE_LUNARLAKE ||
+	    (xe->info.platform == XE_PANTHERLAKE &&
+	     xe->info.revid == PTL_SOC_STEP_A0))
+		/* 4 dummy writes */
+		for (i = 0; i < 4; i++)
+			writel(0, mmio->regs + DUMMY_REG_OFFSET);
 }
 
 u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)
diff --git a/drivers/gpu/drm/xe/xe_step.h b/drivers/gpu/drm/xe/xe_step.h
index 686cb59200c2..879486a818e9 100644
--- a/drivers/gpu/drm/xe/xe_step.h
+++ b/drivers/gpu/drm/xe/xe_step.h
@@ -20,4 +20,6 @@ static inline u32 xe_step_to_gmdid(enum xe_step step) { return step - STEP_A0; }
 
 const char *xe_step_name(enum xe_step step);
 
+#define PTL_SOC_STEP_A0  0x0
+
 #endif
-- 
2.45.0