[PATCH 3/5] drm/xe/gen12: L3 recommended hashing mask

[Lucas De Marchi]

On Wed, Jan 29, 2025 at 03:56:25PM +0000, Tvrtko Ursulin wrote:
>According to the i915 codebase xe missed to set the recommended
>performance tuning for L3 hashing which is applicable to all legacy Gen12
>platforms. Lets add it.
>
>Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at igalia.com>
>References: c46c5fb725be ("drm/i915/gen12: Apply recommended L3 hashing mask")
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Cc: Matt Roper <matthew.d.roper at intel.com>
>---
>I could not find the reference to this in the public docs, including
>confirmation whether 0xb004 even exists on for example TGL. Then for ADL I
>don't see that PRMs have been made public at all.

leaving this part to confirm later. Matt Roper may remember better and
chime in.

>---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 +++
> drivers/gpu/drm/xe/xe_tuning.c       | 6 ++++++
> 2 files changed, 9 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>index 096859072396..909638b18557 100644
>--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>@@ -366,6 +366,9 @@
> #define   XEHPC_OVRLSCCC			REG_BIT(0)
>
> /* L3 Cache Control */
>+#define GEN8_GARBCNTL                          XE_REG(0xb004)

mind the commit 0bc519d20ffa ("drm/xe: Remove GEN[0-9]*_ prefixes")
GEN<x> prefixes/suffixes are not here on purpose.
When we refer to GEN12, it's XELP, or simply drop the prefix when it's
not needed.

Registers here are sorted by address, so it should be before
XEHPC_LNCFMISCCFGREG0



>+#define   GEN12_BUS_HASH_CTL_BIT_EXC           REG_BIT(7)
>+
> #define LNCFCMOCS_REG_COUNT			32
> #define XELP_LNCFCMOCS(i)			XE_REG(0xb020 + (i) * 4)
> #define XEHP_LNCFCMOCS(i)			XE_REG_MCR(0xb020 + (i) * 4)
>diff --git a/drivers/gpu/drm/xe/xe_tuning.c b/drivers/gpu/drm/xe/xe_tuning.c
>index 9e7ec36dbd47..b21a59578ba3 100644
>--- a/drivers/gpu/drm/xe/xe_tuning.c
>+++ b/drivers/gpu/drm/xe/xe_tuning.c
>@@ -107,6 +107,12 @@ static const struct xe_rtp_entry_sr lrc_tunings[] = {
> 						FF_MODE2_TDS_TIMER_128))
> 	},
>
>+	{ XE_RTP_NAME("Tuning: L3 Hashing Mask"),
>+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, 1254),

50..55 are made up in sw... I believe it's safe at this point to just use
GRAPHICS_VERSION_RANGE(1200, 1250)

Lucas De Marchi

>+		       FUNC(xe_rtp_match_first_render_or_compute)),
>+	  XE_RTP_ACTIONS(CLR(GEN8_GARBCNTL, GEN12_BUS_HASH_CTL_BIT_EXC))
>+	},
>+
> 	/* DG2 */
>
> 	{ XE_RTP_NAME("Tuning: L3 cache"),
>-- 
>2.48.0
>