[PATCH 11/14] drm/i915/dp: Use int for compressed BPP in dsc_compute_link_config()

[Imre Deak]

On Fri, Jan 31, 2025 at 02:50:04PM +0200, Jani Nikula wrote:
> Just use ints unless there are actual reasons to do otherwise. Here,
> there are not.
> 
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7a8a4df1bf1e..7c6d277729d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1926,7 +1926,7 @@ static bool intel_dp_dsc_supports_format(const struct intel_connector *connector
>  	return drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, sink_dsc_format);
>  }
>  
> -static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_clock,
> +static bool is_bw_sufficient_for_dsc_config(int dsc_bpp_x16, u32 link_clock,
>  					    u32 lane_count, u32 mode_clock,
>  					    enum intel_output_format output_format,
>  					    int timeslots)
> @@ -1934,7 +1934,7 @@ static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_cloc
>  	u32 available_bw, required_bw;
>  
>  	available_bw = (link_clock * lane_count * timeslots * 16)  / 8;
> -	required_bw = compressed_bppx16 * (intel_dp_mode_to_fec_clock(mode_clock));
> +	required_bw = dsc_bpp_x16 * (intel_dp_mode_to_fec_clock(mode_clock));

This reduces the range for dsc_bpp_x16 and mode_clock where the above
multiply won't overflow, but afaics with the current max values of those
this is still ok:

Reviewed-by: Imre Deak <imre.deak at intel.com>

>  
>  	return available_bw > required_bw;
>  }
> @@ -1942,7 +1942,7 @@ static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_cloc
>  static int dsc_compute_link_config(struct intel_dp *intel_dp,
>  				   struct intel_crtc_state *pipe_config,
>  				   const struct link_config_limits *limits,
> -				   u16 compressed_bppx16,
> +				   int dsc_bpp_x16,
>  				   int timeslots)
>  {
>  	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> @@ -1957,7 +1957,7 @@ static int dsc_compute_link_config(struct intel_dp *intel_dp,
>  		for (lane_count = limits->min_lane_count;
>  		     lane_count <= limits->max_lane_count;
>  		     lane_count <<= 1) {
> -			if (!is_bw_sufficient_for_dsc_config(compressed_bppx16, link_rate,
> +			if (!is_bw_sufficient_for_dsc_config(dsc_bpp_x16, link_rate,
>  							     lane_count, adjusted_mode->clock,
>  							     pipe_config->output_format,
>  							     timeslots))
> -- 
> 2.39.5
>