[PATCH v5 09/12] platform/x86/intel/pmt: add register access helpers

[Ruhl, Michael J]

>-----Original Message-----
>From: Ruhl, Michael J <michael.j.ruhl at intel.com>
>Sent: Friday, June 27, 2025 4:43 PM
>To: platform-driver-x86 at vger.kernel.org; intel-xe at lists.freedesktop.org;
>hdegoede at redhat.com; ilpo.jarvinen at linux.intel.com; De Marchi, Lucas
><lucas.demarchi at intel.com>; Vivi, Rodrigo <rodrigo.vivi at intel.com>;
>thomas.hellstrom at linux.intel.com; airlied at gmail.com; simona at ffwll.ch;
>david.e.box at linux.intel.com
>Cc: Ruhl, Michael J <michael.j.ruhl at intel.com>
>Subject: [PATCH v5 09/12] platform/x86/intel/pmt: add register access helpers
>
>The control register is used in a read/modify/write pattern.
>The status register is used in a read/check bit pattern.
>
>Add helpers to eliminate common code.
>
>Signed-off-by: Michael J. Ruhl <michael.j.ruhl at intel.com>
>---
> drivers/platform/x86/intel/pmt/crashlog.c | 60 ++++++++++++-----------
> 1 file changed, 31 insertions(+), 29 deletions(-)
>
>diff --git a/drivers/platform/x86/intel/pmt/crashlog.c
>b/drivers/platform/x86/intel/pmt/crashlog.c
>index 23b3971da40a..adaca7ce1ba5 100644
>--- a/drivers/platform/x86/intel/pmt/crashlog.c
>+++ b/drivers/platform/x86/intel/pmt/crashlog.c
>@@ -64,20 +64,42 @@ struct pmt_crashlog_priv {
> /*
>  * I/O
>  */
>-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
>+#define CRASHLOG_SET_BIT	true
>+#define CRASHLOG_CLEAR_BIT	false
>+
>+/* read/modify/write */
>+static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool
>set)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
>+
>+	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>+
>+	if (set)
>+		reg |= bit;
>+	else
>+		reg &= bit;

This should be:

reg &= ~bit;

(updating patch set).

M

>+
>+	writel(reg, entry->disc_table + CONTROL_OFFSET);
>+}
>+
>+/* read/check */
>+static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
>+{
>+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
>+
>+	return !!(reg & bit);
>+}
>
>+static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
>+{
> 	/* return current value of the crashlog complete flag */
>-	return !!(control & CRASHLOG_FLAG_TRIGGER_COMPLETE);
>+	return pmt_crashlog_rc(entry,
>CRASHLOG_FLAG_TRIGGER_COMPLETE);
> }
>
> static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
> 	/* return current value of the crashlog disabled flag */
>-	return !!(control & CRASHLOG_FLAG_DISABLE);
>+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
> }
>
> static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
>@@ -98,37 +120,17 @@ static bool pmt_crashlog_supported(struct
>intel_pmt_entry *entry)
> static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
> 				     bool disable)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
>-	/* clear trigger bits so we are only modifying disable flag */
>-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>-
>-	if (disable)
>-		control |= CRASHLOG_FLAG_DISABLE;
>-	else
>-		control &= ~CRASHLOG_FLAG_DISABLE;
>-
>-	writel(control, entry->disc_table + CONTROL_OFFSET);
>+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
> }
>
> static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
>-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>-	control |= CRASHLOG_FLAG_TRIGGER_CLEAR;
>-
>-	writel(control, entry->disc_table + CONTROL_OFFSET);
>+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR,
>CRASHLOG_SET_BIT);
> }
>
> static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
>-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>-	control |= CRASHLOG_FLAG_TRIGGER_EXECUTE;
>-
>-	writel(control, entry->disc_table + CONTROL_OFFSET);
>+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE,
>CRASHLOG_SET_BIT);
> }
>
> /*
>--
>2.49.0