[PATCH v2 4/9] drm/xe: Create ordered workqueue for GT TLB invalidation jobs
Matthew Brost
matthew.brost at intel.com
Wed Jul 2 23:42:17 UTC 2025
No sense to schedule GT TLB invalidation jobs in parallel which target
the same given these all contend on the same lock, create ordered
workqueue for GT TLB invalidation jobs.
Signed-off-by: Matthew Brost <matthew.brost at intel.com>
---
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c | 8 ++++++++
drivers/gpu/drm/xe/xe_gt_types.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
index 6088df8e159c..f6f32600e8a5 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
@@ -3,6 +3,8 @@
* Copyright © 2023 Intel Corporation
*/
+#include <drm/drm_managed.h>
+
#include "xe_gt_tlb_invalidation.h"
#include "abi/guc_actions_abi.h"
@@ -123,6 +125,12 @@ int xe_gt_tlb_invalidation_init_early(struct xe_gt *gt)
INIT_DELAYED_WORK(>->tlb_invalidation.fence_tdr,
xe_gt_tlb_fence_timeout);
+ gt->tlb_invalidation.job_wq =
+ drmm_alloc_ordered_workqueue(>_to_xe(gt)->drm, "gt-tbl-inval-job-wq",
+ WQ_MEM_RECLAIM);
+ if (IS_ERR(gt->tlb_invalidation.job_wq))
+ return PTR_ERR(gt->tlb_invalidation.job_wq);
+
return 0;
}
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index 96344c604726..dfd4a16da5f0 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -210,6 +210,8 @@ struct xe_gt {
* xe_gt_tlb_fence_timeout after the timeut interval is over.
*/
struct delayed_work fence_tdr;
+ /** @wtlb_invalidation.wq: schedules GT TLB invalidation jobs */
+ struct workqueue_struct *job_wq;
/** @tlb_invalidation.lock: protects TLB invalidation fences */
spinlock_t lock;
} tlb_invalidation;
--
2.34.1
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