[PATCH 5/7] drm/xe/lrc: Remove leftover TODO

[Lucas De Marchi]

On Mon, Jul 07, 2025 at 10:08:33PM -0700, Matthew Brost wrote:
>On Thu, Jul 03, 2025 at 03:41:14PM -0700, Lucas De Marchi wrote:
>> There isn't anything to set for CTX_TIMESTAMP handling in the empty
>> LRC, that is set on every LRC init since it should always start from 0
>> rather than the value saved in the image after first submission.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_lrc.c | 2 --
>>  1 file changed, 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>> index 75f4678cb090a..2c735b3679f86 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.c
>> +++ b/drivers/gpu/drm/xe/xe_lrc.c
>> @@ -603,8 +603,6 @@ static void set_context_control(u32 *regs, struct xe_hw_engine *hwe)
>>  	if (xe_gt_has_indirect_ring_state(hwe->gt))
>>  		regs[CTX_CONTEXT_CONTROL] |=
>>  			_MASKED_BIT_ENABLE(CTX_CTRL_INDIRECT_RING_STATE_ENABLE);
>> -
>> -	/* TODO: Timestamp */
>
>While we are here, we can also remove this one:
>
>1066         /*
>1067          * FIXME: Perma-pinning LRC as we don't yet support moving GGTT address
>1068          * via VM bind calls.
>1069          */
>
>This was from very early in Xe when we thought we'd maybe not pin kernel
>BOs, I don't think we'd ever not pin them. Also the comment actually
>doesn't make sense either, as GGTT mapping have nothing to do with VM
>bind.
>
>Anyways this patch LGTM:
>Reviewed-by: Matthew Brost <matthew.brost at intel.com>

I will add this comment removal and keep the r-b. Thanks.

Lucas De Marchi

>
>>  }
>>
>>  static void set_memory_based_intr(u32 *regs, struct xe_hw_engine *hwe)
>>
>> --
>> 2.49.0
>>