[PATCH 4/4] drm/xe: Enable SR-IOV for ADL/ATSM

[Cavitt, Jonathan]

-----Original Message-----
From: Wajdeczko, Michal <Michal.Wajdeczko at intel.com> 
Sent: Tuesday, July 15, 2025 11:33 AM
To: Cavitt, Jonathan <jonathan.cavitt at intel.com>; intel-xe at lists.freedesktop.org
Cc: Vivi, Rodrigo <rodrigo.vivi at intel.com>; De Marchi, Lucas <lucas.demarchi at intel.com>; Thomas Hellstrom <thomas.hellstrom at linux.intel.com>; Ceraolo Spurio, Daniele <daniele.ceraolospurio at intel.com>
Subject: Re: [PATCH 4/4] drm/xe: Enable SR-IOV for ADL/ATSM
> 
> On 15.07.2025 20:24, Cavitt, Jonathan wrote:
> > -----Original Message-----
> > From: Wajdeczko, Michal <Michal.Wajdeczko at intel.com> 
> > Sent: Tuesday, July 15, 2025 11:14 AM
> > To: intel-xe at lists.freedesktop.org
> > Cc: Wajdeczko, Michal <Michal.Wajdeczko at intel.com>; Vivi, Rodrigo <rodrigo.vivi at intel.com>; De Marchi, Lucas <lucas.demarchi at intel.com>; Thomas Hellstrom <thomas.hellstrom at linux.intel.com>; Cavitt, Jonathan <jonathan.cavitt at intel.com>; Ceraolo Spurio, Daniele <daniele.ceraolospurio at intel.com>
> > Subject: [PATCH 4/4] drm/xe: Enable SR-IOV for ADL/ATSM
> >>
> >> We should now have sufficient changes in the Xe driver changes to
> >> run it on ADL and ATSM platforms in the PF mode, to configure VFs
> >> and successfully probe driver on the enabled VF devices.
> >>
> >> While some more changes are likely still needed to fix all corner
> >> cases, we will not find them without running any tests. To start
> >> testing this feature by the CI, we need to mark which platforms
> >> have basic SR-IOV support and let the driver run in the PF mode.
> >>
> >> Since this feature support is still in the early testing stage,
> >> make all enabling available only for CONFIG_DRM_XE_DEBUG=y and
> >> keep it on CI topic branch.
> >>
> >> Note that from this point, on selected platforms, the Xe driver
> >> will be acting as a PF driver, will some SR-IOV specific changes
> >> compared to running in the non-virtualized (native) mode.
> >>
> >> However, those specific changes are visible mostly on the debugfs,
> >> and should not impact normal driver execution, unless VFs will be
> >> manually provisioned or explicitly enabled.
> >>
> >> Once we finish adding the remaining SR-IOV tests to the CI and fix
> >> any issues that we find in the meantime, we will replace this patch
> >> with proper series outside the topic branch.
> > 
> > We're reapplying this patch with the purpose of removing it from the
> > CI topic branch and putting it in its "proper" place, yes?  If so, then we
> 
> no, this patch stays in for-CI topic branch, it was just rebased on top
> of patch 2/4 that will go first to drm-xe-next

And the rebase was necessary because
"drm/xe/pf: Add max_vfs configfs attribute to control PF mode" (patch 3)
needed a partial component of this original reverted patch (patch 1),
so patch 1 was split into two different patches (patch 2 and patch 4)
and patch 3 was inserted between the two?

Why did patch 3 need to be inserted between patches 2 and 4?  It seems like
it could've just been applied on top of everything else, at least from a cursory
glance.

-Jonathan Cavitt

> 
> > should probably remove this sentence, as the replacement mentioned
> > in it is being done presently.
> > 
> > My RB otherwise stands.
> > 
> > -Jonathan Cavitt
> > 
> >>
> >> Suggested-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> >> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> >> Acked-by: Lucas De Marchi <lucas.demarchi at intel.com>
> >> Acked-by: Thomas Hellstrom <thomas.hellstrom at linux.intel.com>
> >> Reviewed-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
> >> Link: https://patchwork.freedesktop.org/patch/msgid/20240711192320.1198-3-michal.wajdeczko@intel.com
> >> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> >> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> >> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> >> ---
> >> [michal] rebased, for drm-xe/topic/xe-for-CI
> >> ---
> >>  drivers/gpu/drm/xe/xe_pci.c | 4 ++++
> >>  1 file changed, 4 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> >> index 53d45779cbe9..dc4c8e861a84 100644
> >> --- a/drivers/gpu/drm/xe/xe_pci.c
> >> +++ b/drivers/gpu/drm/xe/xe_pci.c
> >> @@ -193,6 +193,7 @@ static const struct xe_device_desc adl_s_desc = {
> >>  	.dma_mask_size = 39,
> >>  	.has_display = true,
> >>  	.has_llc = true,
> >> +	.has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
> >>  	.max_gt_per_tile = 1,
> >>  	.require_force_probe = true,
> >>  	.subplatforms = (const struct xe_subplatform_desc[]) {
> >> @@ -210,6 +211,7 @@ static const struct xe_device_desc adl_p_desc = {
> >>  	.dma_mask_size = 39,
> >>  	.has_display = true,
> >>  	.has_llc = true,
> >> +	.has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
> >>  	.max_gt_per_tile = 1,
> >>  	.require_force_probe = true,
> >>  	.subplatforms = (const struct xe_subplatform_desc[]) {
> >> @@ -225,6 +227,7 @@ static const struct xe_device_desc adl_n_desc = {
> >>  	.dma_mask_size = 39,
> >>  	.has_display = true,
> >>  	.has_llc = true,
> >> +	.has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
> >>  	.max_gt_per_tile = 1,
> >>  	.require_force_probe = true,
> >>  };
> >> @@ -270,6 +273,7 @@ static const struct xe_device_desc ats_m_desc = {
> >>  
> >>  	DG2_FEATURES,
> >>  	.has_display = false,
> >> +	.has_sriov = IS_ENABLED(CONFIG_DRM_XE_DEBUG),
> >>  };
> >>  
> >>  static const struct xe_device_desc dg2_desc = {
> >> -- 
> >> 2.47.1
> >>
> >>
> 
>