[PATCH 4/4] drm/xe: Add xe_tlb_inval structure
stuartsummers
stuart.summers at intel.com
Tue Jul 15 21:21:25 UTC 2025
From: Matthew Brost <matthew.brost at intel.com>
Extract TLB invalidation state into a structure to decouple TLB
invalidations from the GT, allowing the structure to be embedded
anywhere in the driver.
Signed-off-by: Matthew Brost <matthew.brost at intel.com>
Signed-off-by: Stuart Summers <stuart.summers at intel.com>
---
drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h | 30 ++++++++++++++++++++++
drivers/gpu/drm/xe/xe_gt_types.h | 29 ++-------------------
2 files changed, 32 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
index 919430359103..b998276dd931 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_inval_types.h
@@ -6,10 +6,40 @@
#ifndef _XE_GT_TLB_INVAL_TYPES_H_
#define _XE_GT_TLB_INVAL_TYPES_H_
+#include <linux/workqueue.h>
#include <linux/dma-fence.h>
struct xe_gt;
+/** struct xe_tlb_inval - TLB invalidation client */
+struct xe_tlb_inval {
+ /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
+#define TLB_INVALIDATION_SEQNO_MAX 0x100000
+ int seqno;
+ /**
+ * @tlb_inval.seqno_recv: last received TLB invalidation seqno,
+ * protected by CT lock
+ */
+ int seqno_recv;
+ /**
+ * @tlb_inval.pending_fences: list of pending fences waiting TLB
+ * invaliations, protected by CT lock
+ */
+ struct list_head pending_fences;
+ /**
+ * @tlb_inval.pending_lock: protects @tlb_inval.pending_fences
+ * and updating @tlb_inval.seqno_recv.
+ */
+ spinlock_t pending_lock;
+ /**
+ * @tlb_inval.fence_tdr: schedules a delayed call to
+ * xe_gt_tlb_fence_timeout after the timeut interval is over.
+ */
+ struct delayed_work fence_tdr;
+ /** @tlb_inval.lock: protects TLB invalidation fences */
+ spinlock_t lock;
+};
+
/**
* struct xe_gt_tlb_inval_fence - XE GT TLB invalidation fence
*
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index b82795fc0070..ed21bd63b001 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -12,6 +12,7 @@
#include "xe_gt_sriov_pf_types.h"
#include "xe_gt_sriov_vf_types.h"
#include "xe_gt_stats_types.h"
+#include "xe_gt_tlb_inval_types.h"
#include "xe_hw_engine_types.h"
#include "xe_hw_fence_types.h"
#include "xe_oa_types.h"
@@ -186,33 +187,7 @@ struct xe_gt {
} reset;
/** @tlb_inval: TLB invalidation state */
- struct {
- /** @tlb_inval.seqno: TLB invalidation seqno, protected by CT lock */
-#define TLB_INVALIDATION_SEQNO_MAX 0x100000
- int seqno;
- /**
- * @tlb_inval.seqno_recv: last received TLB invalidation seqno,
- * protected by CT lock
- */
- int seqno_recv;
- /**
- * @tlb_inval.pending_fences: list of pending fences waiting TLB
- * invaliations, protected by CT lock
- */
- struct list_head pending_fences;
- /**
- * @tlb_inval.pending_lock: protects @tlb_inval.pending_fences
- * and updating @tlb_inval.seqno_recv.
- */
- spinlock_t pending_lock;
- /**
- * @tlb_inval.fence_tdr: schedules a delayed call to
- * xe_gt_tlb_fence_timeout after the timeut interval is over.
- */
- struct delayed_work fence_tdr;
- /** @tlb_inval.lock: protects TLB invalidation fences */
- spinlock_t lock;
- } tlb_inval;
+ struct xe_tlb_inval tlb_inval;
/**
* @ccs_mode: Number of compute engines enabled.
--
2.34.1
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