[PATCH 2/2] drm/i915/edp: eDP Data Overrride

[Suraj Kandpal]

We need override certain link rates in favour of the next available
higher link rate. The Link rates that need to be overridden are
indicated by a mask in VBT. To make sure these modes are skipped we
don't add them in them in the sink rates array.

Signed-off-by: Suraj Kandpal <suraj.kandpal at intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 56 +++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_bios.h |  2 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 11 +++--
 3 files changed, 66 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 9c268bed091d..565358e2385f 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2480,6 +2480,53 @@ static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
 	}
 }
 
+static bool parse_bdb_263_edp_data_override(const u32 edp_data_override_mask, int rate)
+{
+	u32 val;
+
+	switch (rate) {
+	default:
+	case 2000000:
+		val = BDB_263_VBT_EDP_LINK_RATE_20;
+		break;
+	case 1350000:
+		val = BDB_263_VBT_EDP_LINK_RATE_13_5;
+		break;
+	case 1000000:
+		val = BDB_263_VBT_EDP_LINK_RATE_10;
+		break;
+	case 810000:
+		val = BDB_263_VBT_EDP_LINK_RATE_8_1;
+		break;
+	case 675000:
+		val = BDB_263_VBT_EDP_LINK_RATE_6_75;
+		break;
+	case 540000:
+		val = BDB_263_VBT_EDP_LINK_RATE_5_4;
+		break;
+	case 432000:
+		val = BDB_263_VBT_EDP_LINK_RATE_4_32;
+		break;
+	case 324000:
+		val = BDB_263_VBT_EDP_LINK_RATE_3_24;
+		break;
+	case 270000:
+		val = BDB_263_VBT_EDP_LINK_RATE_2_7;
+		break;
+	case 243000:
+		val = BDB_263_VBT_EDP_LINK_RATE_2_43;
+		break;
+	case 216000:
+		val = BDB_263_VBT_EDP_LINK_RATE_2_16;
+		break;
+	case 162000:
+		val = BDB_263_VBT_EDP_LINK_RATE_1_62;
+		break;
+	}
+
+	return edp_data_override_mask & val;
+}
+
 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
 {
 	if (!devdata || devdata->display->vbt.version < 216)
@@ -2499,6 +2546,15 @@ int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
 	return devdata->child.dp_max_lane_count + 1;
 }
 
+bool
+intel_bios_edp_data_override(const struct intel_bios_encoder_data *devdata, int rate)
+{
+	if (!devdata || devdata->display->vbt.version < 263)
+		return false;
+
+	return parse_bdb_263_edp_data_override(devdata->child.edp_data_override, rate);
+}
+
 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
 				 enum port port)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 6cd7a011b8c4..b554fff96082 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -274,5 +274,7 @@ void intel_bios_for_each_encoder(struct intel_display *display,
 					      const struct intel_bios_encoder_data *devdata));
 
 void intel_bios_debugfs_register(struct intel_display *display);
+bool
+intel_bios_edp_data_override(const struct intel_bios_encoder_data *devdata, int rate);
 
 #endif /* _INTEL_BIOS_H_ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 6d4e0fa0c054..0a227822b46a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4275,12 +4275,13 @@ static void
 intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
+	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
 
 	intel_dp->num_sink_rates = 0;
 
 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
 		__le16 sink_rates[DP_MAX_SUPPORTED_RATES];
-		int i;
+		int i, j = 0;
 
 		drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,
 				 sink_rates, sizeof(sink_rates));
@@ -4308,9 +4309,13 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 			    intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2))
 				break;
 
-			intel_dp->sink_rates[i] = rate;
+			if (intel_bios_edp_data_override(encoder->devdata, rate))
+				continue;
+
+			intel_dp->sink_rates[j] = rate;
+			j++;
 		}
-		intel_dp->num_sink_rates = i;
+		intel_dp->num_sink_rates = j;
 	}
 
 	/*
-- 
2.34.1