[CI 0/4] adl css test run
Tvrtko Ursulin
tvrtko.ursulin at igalia.com
Thu Jul 24 16:39:56 UTC 2025
Poor man's "bisect" part 1
Tvrtko Ursulin (4):
drm/xe/xelp: Quiesce memory traffic before invalidating auxccs
drm/xe/xelp: Support auxccs invalidation on blitter
drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms
drm/xe/xelp: Wait for AuxCCS invalidation to complete
.../gpu/drm/xe/instructions/xe_mi_commands.h | 6 +
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
drivers/gpu/drm/xe/xe_ring_ops.c | 121 ++++++++----------
drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +-
4 files changed, 63 insertions(+), 67 deletions(-)
--
2.48.0
More information about the Intel-xe
mailing list