[PATCH v2 2/6] drm/xe: Use iosys_map helpers for WA BB emission

[Tvrtko Ursulin]

To properly support discrete GPUs on all platforms it is required to use
the iosys_map helpers.

To fix we emit the WA BB into an on stack buffer and copy it over using
xe_map_memcpy_to().

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at igalia.com>
Fixes: 617d824c5323 ("drm/xe: Add WA BB to capture active context utilization")
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com
Cc: Lucas De Marchi <lucas.demarchi at intel.com>
Cc: Matt Roper <matthew.d.roper at intel.com>
---
 drivers/gpu/drm/xe/xe_lrc.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index e81ee6c98a8a..ca7ffc7bbdc8 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -943,9 +943,10 @@ static void xe_lrc_finish(struct xe_lrc *lrc)
 #define CONTEXT_ACTIVE 1ULL
 static void xe_lrc_setup_utilization(struct xe_lrc *lrc)
 {
-	u32 *cmd;
-
-	cmd = lrc->bb_per_ctx_bo->vmap.vaddr;
+	struct xe_device *xe = lrc_to_xe(lrc);
+	unsigned int num_dw;
+	u32 batch[13];
+	u32 *cmd = batch;
 
 	*cmd++ = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT | MI_SRM_ADD_CS_OFFSET;
 	*cmd++ = ENGINE_ID(0).addr;
@@ -957,7 +958,7 @@ static void xe_lrc_setup_utilization(struct xe_lrc *lrc)
 	*cmd++ = 0;
 	*cmd++ = lower_32_bits(CONTEXT_ACTIVE);
 
-	if (lrc_to_xe(lrc)->info.has_64bit_timestamp) {
+	if (xe->info.has_64bit_timestamp) {
 		*cmd++ = MI_STORE_DATA_IMM | MI_SDI_GGTT | MI_SDI_NUM_DW(1);
 		*cmd++ = __xe_lrc_ctx_timestamp_udw_ggtt_addr(lrc);
 		*cmd++ = 0;
@@ -966,9 +967,12 @@ static void xe_lrc_setup_utilization(struct xe_lrc *lrc)
 
 	*cmd++ = MI_BATCH_BUFFER_END;
 
+	num_dw = cmd - batch;
+	xe_map_memcpy_to(xe, &lrc->bb_per_ctx_bo->vmap, 0, batch,
+			 num_dw * sizeof(u32));
+
 	xe_lrc_write_ctx_reg(lrc, CTX_BB_PER_CTX_PTR,
 			     xe_bo_ggtt_addr(lrc->bb_per_ctx_bo) | 1);
-
 }
 
 #define PVC_CTX_ASID		(0x2e + 1)
-- 
2.48.0