Re: ✗ Xe.CI.Full: failure for VF: Small updates around GGTT handling

[Michal Wajdeczko]

On 02.06.2025 18:07, Patchwork wrote:
> == Series Details ==
> 
> Series: VF: Small updates around GGTT handling
> URL   : https://patchwork.freedesktop.org/series/149730/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from xe-3171-908b29f2f229f4625b8c3735e6d5ff99234277b2_FULL -> xe-pw-149730v1_FULL
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with xe-pw-149730v1_FULL absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in xe-pw-149730v1_FULL, please notify your bug team (I915-ci-infra at lists.freedesktop.org) to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (4 -> 4)
> ------------------------------
> 
>   No changes in participating hosts
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in xe-pw-149730v1_FULL:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt at xe_exec_threads@threads-bal-mixed-userptr-invalidate:
>     - shard-dg2-set2:     [PASS][1] -> [ABORT][2]
>    [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3171-908b29f2f229f4625b8c3735e6d5ff99234277b2/shard-dg2-432/igt@xe_exec_threads@threads-bal-mixed-userptr-invalidate.html
>    [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149730v1/shard-dg2-434/igt@xe_exec_threads@threads-bal-mixed-userptr-invalidate.html

unrelated assert hit on non-VF run:

<7>[   51.174821] xe 0000:03:00.0: [drm:xe_pci_probe [xe]] SR-IOV
support: no (mode: none)

...

<4> [376.258534] xe 0000:03:00.0: [drm] Assertion
`!exec_queue_pending_disable(q)` failed!
platform: DG2 subplatform: 6
graphics: Xe_HPG 12.55 step A1
media: Xe_HPM 12.55 step A1
tile: 0 VRAM 6.00 GiB
GT: 0 type 1
<4> [376.258555] WARNING: CPU: 0 PID: 9171 at
drivers/gpu/drm/xe/xe_guc_submit.c:1003 enable_scheduling+0x443/0x920 [xe]