[RESEND 3/6] drm/i915/wm: DG2 doesn't have dram info to look up wm_lv_0_adjust_needed

[Jani Nikula]

On Wed, 04 Jun 2025, "Govindapillai, Vinod" <vinod.govindapillai at intel.com> wrote:
> On Tue, 2025-05-27 at 12:25 +0300, Jani Nikula wrote:
>> There's no dram info on DG2 that we could use. The struct dram_info is
>> all zero on it, but be explicit about this.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
>> b/drivers/gpu/drm/i915/display/skl_watermark.c
>> index f5600f4b7772..817939f6d4dd 100644
>> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
>> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
>> @@ -3251,7 +3251,7 @@ adjust_wm_latency(struct intel_display *display,
>>  	 * any underrun. If not able to get Dimm info assume 16GB dimm
>>  	 * to avoid any underrun.
>>  	 */
>> -	if (dram_info->wm_lv_0_adjust_needed)
>> +	if (!display->platform.dg2 && dram_info->wm_lv_0_adjust_needed)
>
> For Disp version >= 12, wm_lv_0_adjust_needed is hard coded to false. So I don't think this explicit
> DG2 check is needed here..

The point here is that there is no dram info parsing for DG2 at
all. intel_dram_detect() bails out early for DG2. It's wrong to even
look at it.

And part of that is preparation for patch 6, where dram_info will be
NULL for platforms that don't do dram info parsing!

BR,
Jani.



>
> with that,
>
> Reviewed-by: Vinod Govindapillai <vinod.govindapillai at intel.com>
>
>
>
>>  		wm[0] += 1;
>>  }
>>  
>

-- 
Jani Nikula, Intel